AIPS: AI-Based Power Simulation for Pre-silicon Side-Channel Security Evaluation

This directory contains the design files corresponding to the paper "AIPS: AI-Based Power Simulation for Pre-silicon Side-Channel Security Evaluation".

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Overview

This repository uses the AES circuit as a representative example to demonstrate the complete AIPS workflow.

These components correspond to the three major stages of the AIPS pipeline:

• Data Preparation
• Diffusion Model
• Security Evaluation

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Table of Contents

• Prerequisites
• Usage
  • Data Preparation
  • Diffusion Model
  • Security Evaluation
• Contact
• Copyright
• Citation

Prerequisites

At a minimum:

• Python 3.8+ with PIP
• VCS, PrimeTime PX
• Linux or Windows

Usage

Data Preparation

This stage prepares the structural and activity-related information required for AIPS. It processes the gate-level netlist and signal activities to extract circuit topology, cell features, and VCD traces.

Topology_analysis.py

This script extracts the topological connectivity between logic cells and signals from a flattened gate-level netlist. It parses the netlist and constructs a cell-centric representation of the circuit structure.

Input:
- Flattened gate-level Verilog netlist (e.g., `aes.v`)
Output:
- `cell2pin.pkl`

The output file `cell2pin.pkl` is a Python dictionary with the following structure:
- Key:   Cell instance name
- Value: A list containing
  1. The cell type
  2. A list of two dictionaries:
     - Input pin–to–net mapping
     - Output pin–to–net mapping

**Example**

control_U30 [
    'XNOR2X1',
    [
        {'A': 'control_gray_dout[0]', 'B': 'control_gray_dout[3]'},
        {'Y': 'control_n5'}
    ]
]

Lib_parser.py

This script parses a Liberty file and extracts cell leakage power together with internal power information. For each cell, it summarizes the internal_power tables by taking the median value of the values(...) entries.

Input:
- Liberty `.lib` file (e.g., `fast.lib`)
Output:
- `cell_power.pkl`

The output is stored as a Python dictionary:
- Key:   Cell name (e.g., XNOR2X1)
- Value: A list of floats, where:
  1. The first element is `cell_leakage_power`
  2. The remaining elements are the extracted internal-power summary values

**Example**

XNOR2X1: [355.859064, 0.051917, 0.084137, 0.080041, 0.067042, 0.09906, 0.14078, 0.133293, 0.111911]

cell_feature.py

This script integrates cell-level structural and power-related information into a unified feature representation. It combines the parsed Liberty power data with the set of cell types extracted from the netlist topology. The resulting feature matrix is used as the cell-level feature input to the AIPS diffusion model.

Input:
- `cell2pin.pkl`
- `cell_power.pkl`
Output:
- `cell_feature.npy`

VCD_parser.py

This script processes VCD switching activities and converts them into time-aligned numerical representations suitable for AIPS. It implements a three-stage VCD processing pipeline with optional GPU acceleration.

Input:
- Large VCD file containing multiple stimuli (e.g., `SwitchFile_.vcd`)
Output:
- Aggregated switching activity array: `pin_switch_mean_.npy`

Step 1: VCD Splitting
The script splits a large VCD file containing multiple stimuli into multiple partial VCD files, each corresponding to a single plaintext.
Time indices are re-aligned such that each partial VCD starts at time zero.

Step 2: VCD Parsing
Each partial VCD is parsed to extract signal-level switching activity within a fixed observation window.
For each signal and each time slice, the number of logic transitions is counted and stored in a pickle file.

Step 3: Post-processing
The extracted toggle data are aggregated across all signals.
For each stimulus, the mean switching activity over time is computed, resulting in a 2D NumPy array.

Out_parser.py

This script processes gate-level power reports and converts them into time-aligned power traces suitable for side-channel security analysis. It extracts power values across multiple stimuli and organizes them into a structured NumPy array.

Input:
- Power report file generated by PTPX (e.g., `PowerFile_.out`)
Output:
- Power trace array: `power_trace_.npy`

Diffusion Model

This stage implements the diffusion-based power simulation model used in AIPS. The model learns to generate realistic power traces conditioned on VCD traces and cell features.

Diffusion_model.py

This script implements both training and inference of the AIPS diffusion model.

Input:
- VCD-based activity traces: `pin_switch_mean_.npy`
- Cell-level feature matrix: `cell_feature.npy`
- (Training only) Ground-truth power traces: `power_trace_.npy`
Output:
- Trained model checkpoint: `latent_dae.pth`
- Normalization scalers: `scalers.pkl`
- Generated power traces: `Power_trace_ _pre.npy`

Security Evaluation

This stage evaluates both PTPX and AIPS-generated power traces using standard side-channel analysis techniques.

RunCpaAttack.py

This script performs Correlation Power Analysis (CPA) on power traces to evaluate the side-channel security of the target implementation. It applies standard CPA using the scared framework and reports key-recovery performance.

Input:
- Plaintext file: `StimuliFile_.txt`
- Power traces: `power_trace_.npy`
- Secret key
Output:
- CPA result plots: `CpaAttackByte<i>.png`
- Console report of recovered key bytes

This script is sourced from GitHub.

Contact

Name	Affiliation	email

Copyright

It is mainly intended for non-commercial use, such as academic research.

Citation

If you utilize AIPS in your research, we kindly request citation of the respective publication:

@ARTICLE{XXX,
  author={xxx},
  journal={XXX}, 
  title={AIPS: AI-Based Power Simulation for Pre-silicon Side-Channel Security Evaluation}, 
  year={2026},
  volume={},
  number={},
  pages={},
  keywords={},
  doi={}}