GELSA, a Performance-Driven Flexible Placement Tool for Analog Integrated Circuits
GELSA uses Simulated Annealing to generate placement and global routing for analog integrated circuits. Given a set of transistor-level cells with their dimensions, pin connectivity, and design constraints (symmetry, matching, well proximity, abutment), it optimizes a multi-objective cost function to produce a compact floorplan with routable channels. It was developed by Juan Prieto (juanpri AT gmail.com) at the Centro Nacional de Microelectronica, Sevilla (1992-2000).
All input files are placed in a gelsa/ subdirectory relative to where the binary is run. See example_perfd3/gelsa/ for a complete working example.
Defines every cell in the circuit: type, name, position, dimensions, and pin connectivity. The first line is the circuit name. Each cell block starts with a type prefix (N: NMOS, P: PMOS, C: capacitor), followed by pins (D: drain, G: gate, S: source, T: extra terminal).
Single-shape format (one aspect ratio per cell):
AMPLIFICADOR
N:N1a 69 112 60 36
D:dn1a 0.0 -1.0 5
G:gn1a -1.0 -0.8 1
S:sn1a 0.0 1.0 3
P:P3a 74 9 11 37
S:sp3a 1.0 -0.0 50
G:gp3a -0.0 1.0 7
D:dp3a -1.0 -0.0 5
END
Cell line: TYPE:NAME x y ax ay (position and dimensions).
Pin line: PIN_TYPE:PIN_NAME rel_x rel_y net_id (relative position [-1..1] and net number).
Multi-shape format (multiple aspect ratios for the same cell):
N:N1a 69 112
shape: 60 36
D:dn1a 0.0 -1.0 5
G:gn1a -1.0 -0.8 1
S:sn1a 0.0 1.0 3
shape: 36 60
D:dn1a 0.0 -1.0 5
G:gn1a -1.0 -0.8 1
S:sn1a 0.0 1.0 3
After the cell name and position (x y), instead of inline ax ay, use shape: blocks each with their own ax ay and pin definitions. The SA C_SH move operator switches between shapes during optimization.
A single line in postfix (RPN) notation. Numbers are 1-based cell IDs, H and V are horizontal and vertical cut operators.
29 20 21 H 24 V 25 H 31 H 26 V 27 V 22 V 23 V V 5 7 V 35 V ...
This defines the initial floorplan topology. Can be generated with the gengrafo tool.
Key-value pairs controlling the SA cooling schedule, cost function weights, and feature flags. Terminated by END.
seed=938430216
tfin=1
alfa=0.95
nitert=5
nitermaxt=50
cond=0.0000
cnets=1.5
carea=0.0
cff=0.4
carel=2.5
cbound=1.0
csim=50.0
crests=0.0
cperfs=2.5
csupply=0.0
cdens=1.0
cwells=0.4
calocal=1.5
cabutment=0.5
FFMAX=3.0
FFMIN=1.0
WELLS:ON
D_INTERWELLS=6
LAMBDA=3.0
GR:TIPO15
FIGCHANNELS:ON
MOV_LOCAL_SIM:ON
QUADRATIC:OFF
SELECCION_PROB_MOVS:OFF
MIN_INTER=25
ABUTMENT:ON
END
Cooling schedule: alfa (cooling factor), tfin (final temperature), nitert (iterations multiplier per temperature step), nitermaxt (max iterations cap), cond (stop condition threshold).
Cost weights: cnets (wirelength), carea, cff (form factor), carel (aspect ratio), cbound (boundary nets), csim (symmetry), crests (routing restrictions), cperfs (performance/parasitics), csupply (supply nets), cdens (channel density), cwells, calocal (local affinity), cabutment.
Feature flags: WELLS:ON/OFF, GR:OFF/TIPO1/TIPO2/TIPO15 (global routing type), QUADRATIC:ON/OFF, MOV_LOCAL_SIM:ON/OFF, ABUTMENT:ON/OFF, FIGCHANNELS:ON/OFF, SELECCION_PROB_MOVS:ON/OFF.
This file can be reloaded at runtime by creating a gelsa/STOP file (with any content other than "end").
Assigns weights and types to specific nets. Nets not listed default to weight 10.
PAD 1 10
PAD 2 10
SUPPLY 15 10
SUPPLY 60 10
Format: TYPE net_id weight. Types are PAD (external I/O), SUPPLY (power/ground), or NET (general signal).
Defines symmetry constraints between cells. Each group starts with GS:name, followed by the constraint type, a weight, and the list of 1-based cell IDs.
GS:uno CENTROIDE 1
1 2 3 4
GS:dos STACKED 1
5 7 35 36 8 6
END
Format: GS:group_name TYPE weight then cell IDs on the next line.
Constraint types: CENTROIDE (common centroid), STACKED (vertical stacking), EJE (axis symmetry), EJEXY (XY axis), ARRAY, MATCHING (matched pairs), MATCHMOS, ORIENTATION, CAPSIM (capacitor symmetry).
Global-level symmetry constraints across symmetry groups. Same format as simloc.in. Can be empty (file must still exist or be absent).
Defines routing constraints for sensitive nets. Terminated by END. Can be empty (just END).
END
Declares pairs of cells that should be placed close together. Terminated by end.
afinity 1 2 1
afinity 3 4 1
afinity 5 6 1
end
Format: afinity cell_id1 cell_id2 weight (1-based cell IDs).
Performance sensitivity information for parasitic-aware placement. First line declares the number of net-pair restrictions and the number of performance metrics (must be 1). Then the performance type, bounds, ground net, and a list of net-pair sensitivities.
105 1
ugb -1 0.8e+06
gnd 60
11 12 -25110.1
6 12 -13265.5
...
Line 1: n_restrictions n_performances (n_performances must be 1).
Line 2: perf_name neg_bound pos_bound (-1 means unbounded on that side).
Line 3: gnd ground_net_id.
Remaining lines: net_id1 net_id2 sensitivity_value — the parasitic coupling sensitivity between each net pair.
Pre-computed maximum values for cost normalization. If absent, GELSA computes them automatically from 100 random moves during initialization.
NETS_MAX=12345
RESTS_MAX=678
DENS_MAX=90
END
Single line with the data format version number. Must be compatible with the GELSA binary version.
7.0
- J.A. Prieto, A. Rueda, J.M. Quintana, and J.L. Huertas. "A performance-driven placement algorithm with simultaneous place&route optimization for analog IC's." Proceedings of European Design and Test Conference, pages 389-394, 1997. https://scispace.com/pdf/a-performance-driven-placement-algorithm-with-simultaneous-4smpvtthd3.pdf
- J.A. Prieto. PhD Dissertation, Universidad de Sevilla, 2001, "GELSA: un colocador flexible para circuitos integrados analógicos". https://idus.us.es/items/38e91d74-ee13-4198-8462-825a385e3d58
This project is licensed under the GNU General Public License v3.0.