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AMDGPU: Form min3/max3 from minimumnum/maximumnum #139137

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Merged
merged 1 commit into from
May 9, 2025
Merged

AMDGPU: Form min3/max3 from minimumnum/maximumnum #139137

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8 changes: 8 additions & 0 deletions llvm/lib/Target/AMDGPU/SIISelLowering.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -934,6 +934,8 @@ SITargetLowering::SITargetLowering(const TargetMachine &TM,
ISD::FMAXNUM_IEEE,
ISD::FMINIMUM,
ISD::FMAXIMUM,
ISD::FMINIMUMNUM,
ISD::FMAXIMUMNUM,
ISD::FMA,
ISD::SMIN,
ISD::SMAX,
Expand Down Expand Up @@ -13483,6 +13485,7 @@ static unsigned minMaxOpcToMin3Max3Opc(unsigned Opc) {
switch (Opc) {
case ISD::FMAXNUM:
case ISD::FMAXNUM_IEEE:
case ISD::FMAXIMUMNUM:
return AMDGPUISD::FMAX3;
case ISD::FMAXIMUM:
return AMDGPUISD::FMAXIMUM3;
Expand All @@ -13492,6 +13495,7 @@ static unsigned minMaxOpcToMin3Max3Opc(unsigned Opc) {
return AMDGPUISD::UMAX3;
case ISD::FMINNUM:
case ISD::FMINNUM_IEEE:
case ISD::FMINIMUMNUM:
return AMDGPUISD::FMIN3;
case ISD::FMINIMUM:
return AMDGPUISD::FMINIMUM3;
Expand Down Expand Up @@ -13613,6 +13617,8 @@ static bool supportsMin3Max3(const GCNSubtarget &Subtarget, unsigned Opc,
case ISD::FMAXNUM:
case ISD::FMINNUM_IEEE:
case ISD::FMAXNUM_IEEE:
case ISD::FMINIMUMNUM:
case ISD::FMAXIMUMNUM:
case AMDGPUISD::FMIN_LEGACY:
case AMDGPUISD::FMAX_LEGACY:
return (VT == MVT::f32) || (VT == MVT::f16 && Subtarget.hasMin3Max3_16());
Expand Down Expand Up @@ -15318,6 +15324,8 @@ SDValue SITargetLowering::PerformDAGCombine(SDNode *N,
case ISD::FMINNUM_IEEE:
case ISD::FMAXIMUM:
case ISD::FMINIMUM:
case ISD::FMAXIMUMNUM:
case ISD::FMINIMUMNUM:
case ISD::SMAX:
case ISD::SMIN:
case ISD::UMAX:
Expand Down
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