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[Flang] Generate math.sinh op for single and double precision sinh #162734
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Fixes issue with double precision sinh when using OpenMP offloading with AMD GPUs. The machinery to convert the op to a ROCDL call is already in place. llvm#162733
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@llvm/pr-subscribers-flang-fir-hlfir Author: Ville-Markus Yli-Suutala (VeeEM) ChangesFixes issue with double precision sinh when using OpenMP offloading with AMD GPUs. The machinery to convert the op to a ROCDL call is already in place. Full diff: https://github.com/llvm/llvm-project/pull/162734.diff 3 Files Affected:
diff --git a/flang/lib/Optimizer/Builder/IntrinsicCall.cpp b/flang/lib/Optimizer/Builder/IntrinsicCall.cpp
index de7694ffd468c..b5c5c2d3c0476 100644
--- a/flang/lib/Optimizer/Builder/IntrinsicCall.cpp
+++ b/flang/lib/Optimizer/Builder/IntrinsicCall.cpp
@@ -1723,8 +1723,10 @@ static constexpr MathOperation mathOperations[] = {
genComplexMathOp<mlir::complex::SinOp>},
{"sin", RTNAME_STRING(CSinF128), FuncTypeComplex16Complex16,
genLibF128Call},
- {"sinh", "sinhf", genFuncType<Ty::Real<4>, Ty::Real<4>>, genLibCall},
- {"sinh", "sinh", genFuncType<Ty::Real<8>, Ty::Real<8>>, genLibCall},
+ {"sinh", "sinhf", genFuncType<Ty::Real<4>, Ty::Real<4>>,
+ genMathOp<mlir::math::SinhOp>},
+ {"sinh", "sinh", genFuncType<Ty::Real<8>, Ty::Real<8>>,
+ genMathOp<mlir::math::SinhOp>},
{"sinh", RTNAME_STRING(SinhF128), FuncTypeReal16Real16, genLibF128Call},
{"sinh", "csinhf", genFuncType<Ty::Complex<4>, Ty::Complex<4>>, genLibCall},
{"sinh", "csinh", genFuncType<Ty::Complex<8>, Ty::Complex<8>>, genLibCall},
diff --git a/flang/test/Lower/math-lowering/sinh.f90 b/flang/test/Lower/math-lowering/sinh.f90
index 934385450d07f..a043bad8357c8 100644
--- a/flang/test/Lower/math-lowering/sinh.f90
+++ b/flang/test/Lower/math-lowering/sinh.f90
@@ -1,9 +1,9 @@
-! RUN: bbc -emit-fir %s -o - --math-runtime=fast | FileCheck --check-prefixes=ALL %s
-! RUN: %flang_fc1 -emit-fir -mllvm -math-runtime=fast %s -o - | FileCheck --check-prefixes=ALL %s
-! RUN: bbc -emit-fir %s -o - --math-runtime=relaxed | FileCheck --check-prefixes=ALL %s
-! RUN: %flang_fc1 -emit-fir -mllvm -math-runtime=relaxed %s -o - | FileCheck --check-prefixes=ALL %s
-! RUN: bbc -emit-fir %s -o - --math-runtime=precise | FileCheck --check-prefixes=ALL %s
-! RUN: %flang_fc1 -emit-fir -mllvm -math-runtime=precise %s -o - | FileCheck --check-prefixes=ALL %s
+! RUN: bbc -emit-fir %s -o - --math-runtime=fast | FileCheck --check-prefixes=ALL,FAST %s
+! RUN: %flang_fc1 -emit-fir -mllvm -math-runtime=fast %s -o - | FileCheck --check-prefixes=ALL,FAST %s
+! RUN: bbc -emit-fir %s -o - --math-runtime=relaxed | FileCheck --check-prefixes=ALL,RELAXED %s
+! RUN: %flang_fc1 -emit-fir -mllvm -math-runtime=relaxed %s -o - | FileCheck --check-prefixes=ALL,RELAXED %s
+! RUN: bbc -emit-fir %s -o - --math-runtime=precise | FileCheck --check-prefixes=ALL,PRECISE %s
+! RUN: %flang_fc1 -emit-fir -mllvm -math-runtime=precise %s -o - | FileCheck --check-prefixes=ALL,PRECISE %s
function test_real4(x)
real :: x, test_real4
@@ -11,7 +11,9 @@ function test_real4(x)
end function
! ALL-LABEL: @_QPtest_real4
-! ALL: {{%[A-Za-z0-9._]+}} = fir.call @sinhf({{%[A-Za-z0-9._]+}}) {{.*}}: (f32) -> f32
+! FAST: {{%[A-Za-z0-9._]+}} = math.sinh {{%[A-Za-z0-9._]+}} {{.*}}: f32
+! RELAXED: {{%[A-Za-z0-9._]+}} = math.sinh {{%[A-Za-z0-9._]+}} {{.*}}: f32
+! PRECISE: {{%[A-Za-z0-9._]+}} = fir.call @sinhf({{%[A-Za-z0-9._]+}}) {{.*}}: (f32) -> f32
function test_real8(x)
real(8) :: x, test_real8
@@ -19,7 +21,9 @@ function test_real8(x)
end function
! ALL-LABEL: @_QPtest_real8
-! ALL: {{%[A-Za-z0-9._]+}} = fir.call @sinh({{%[A-Za-z0-9._]+}}) {{.*}}: (f64) -> f64
+! FAST: {{%[A-Za-z0-9._]+}} = math.sinh {{%[A-Za-z0-9._]+}} {{.*}}: f64
+! RELAXED: {{%[A-Za-z0-9._]+}} = math.sinh {{%[A-Za-z0-9._]+}} {{.*}}: f64
+! PRECISE: {{%[A-Za-z0-9._]+}} = fir.call @sinh({{%[A-Za-z0-9._]+}}) {{.*}}: (f64) -> f64
-! ALL-DAG: func.func private @sinhf(f32) -> f32 attributes {fir.bindc_name = "sinhf", fir.runtime}
-! ALL-DAG: func.func private @sinh(f64) -> f64 attributes {fir.bindc_name = "sinh", fir.runtime}
+! PRECISE-DAG: func.func private @sinhf(f32) -> f32 attributes {fir.bindc_name = "sinhf", fir.runtime}
+! PRECISE-DAG: func.func private @sinh(f64) -> f64 attributes {fir.bindc_name = "sinh", fir.runtime}
diff --git a/flang/test/Lower/trigonometric-intrinsics.f90 b/flang/test/Lower/trigonometric-intrinsics.f90
index d1edd4ef48dc3..8465b9ea22114 100644
--- a/flang/test/Lower/trigonometric-intrinsics.f90
+++ b/flang/test/Lower/trigonometric-intrinsics.f90
@@ -278,10 +278,10 @@ subroutine sinh_testcd(z)
! CMPLX-PRECISE: fir.call @csin
! CHECK-LABEL: @fir.sinh.contract.f32.f32
-! CHECK: fir.call {{.*}}sinh
+! CHECK: math.sinh {{.*}} : f32
! CHECK-LABEL: @fir.sinh.contract.f64.f64
-! CHECK: fir.call {{.*}}sinh
+! CHECK: math.sinh {{.*}} : f64
! CHECK-LABEL: @fir.sinh.contract.z32.z32
! CHECK: fir.call @csinhf
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I think this is okay because it matches what is done for ordinary sin. Thanks for the patch
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@tblah Thanks! Can you merge this? I don't have commit rights. |
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@VeeEM Congratulations on having your first Pull Request (PR) merged into the LLVM Project! Your changes will be combined with recent changes from other authors, then tested by our build bots. If there is a problem with a build, you may receive a report in an email or a comment on this PR. Please check whether problems have been caused by your change specifically, as the builds can include changes from many authors. It is not uncommon for your change to be included in a build that fails due to someone else's changes, or infrastructure issues. How to do this, and the rest of the post-merge process, is covered in detail here. If your change does cause a problem, it may be reverted, or you can revert it yourself. This is a normal part of LLVM development. You can fix your changes and open a new PR to merge them again. If you don't get any reports, no action is required from you. Your changes are working as expected, well done! |
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Apologies. I pressed the wrong thing. I should have waited for the pipeline to pass before merging. |
…lvm#162734) Fixes issue with double precision sinh when using OpenMP offloading with AMD GPUs. The machinery to convert the op to a ROCDL call is already in place. llvm#162733
…lvm#162734) Fixes issue with double precision sinh when using OpenMP offloading with AMD GPUs. The machinery to convert the op to a ROCDL call is already in place. llvm#162733
…lvm#162734) Fixes issue with double precision sinh when using OpenMP offloading with AMD GPUs. The machinery to convert the op to a ROCDL call is already in place. llvm#162733
…lvm#162734) Fixes issue with double precision sinh when using OpenMP offloading with AMD GPUs. The machinery to convert the op to a ROCDL call is already in place. llvm#162733
Fixes issue with double precision sinh when using OpenMP offloading with AMD GPUs. The machinery to convert the op to a ROCDL call is already in place.
#162733