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[X86] Remove LOW32_ADDR_ACCESS_RBP RegisterClass #165018

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[X86] Remove LOW32_ADDR_ACCESS_RBP RegisterClass #165018

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2 changes: 1 addition & 1 deletion llvm/lib/Target/X86/X86ISelLowering.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -61665,7 +61665,7 @@ static bool isGRClass(const TargetRegisterClass &RC) {
RC.hasSuperClassEq(&X86::GR16RegClass) ||
RC.hasSuperClassEq(&X86::GR32RegClass) ||
RC.hasSuperClassEq(&X86::GR64RegClass) ||
RC.hasSuperClassEq(&X86::LOW32_ADDR_ACCESS_RBPRegClass);
RC.hasSuperClassEq(&X86::LOW32_ADDR_ACCESSRegClass);
}

/// Check if \p RC is a vector register class.
Expand Down
4 changes: 0 additions & 4 deletions llvm/lib/Target/X86/X86RegisterInfo.td
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Expand Up @@ -716,10 +716,6 @@ def GR64_NOREX2_NOSP : RegisterClass<"X86", [i64], 64,
// which we do not have right now.
def LOW32_ADDR_ACCESS : RegisterClass<"X86", [i32], 32, (add GR32, RIP)>;

// FIXME: This is unused, but deleting it results in codegen changes
def LOW32_ADDR_ACCESS_RBP : RegisterClass<"X86", [i32], 32,
(add LOW32_ADDR_ACCESS, RBP)>;

// A class to support the 'A' assembler constraint: [ER]AX then [ER]DX.
def GR32_AD : RegisterClass<"X86", [i32], 32, (add EAX, EDX)>;
def GR64_AD : RegisterClass<"X86", [i64], 64, (add RAX, RDX)>;
Expand Down
8 changes: 4 additions & 4 deletions llvm/test/CodeGen/MIR/X86/inline-asm-registers.mir
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Expand Up @@ -28,8 +28,8 @@ body: |
liveins: $rdi, $rsi

; CHECK-LABEL: name: test
; CHECK: INLINEASM &foo, 0 /* attdialect */, 4784138 /* regdef:GR64 */, def $rsi, 4784138 /* regdef:GR64 */, def dead $rdi,
INLINEASM &foo, 0, 4784138, def $rsi, 4784138, def dead $rdi, 2147549193, killed $rdi, 2147483657, killed $rsi, 12, implicit-def dead early-clobber $eflags
; CHECK: INLINEASM &foo, 0 /* attdialect */, 4390922 /* regdef:GR64 */, def $rsi, 4390922 /* regdef:GR64 */, def dead $rdi,
INLINEASM &foo, 0, 4390922, def $rsi, 4390922, def dead $rdi, 2147549193, killed $rdi, 2147483657, killed $rsi, 12, implicit-def dead early-clobber $eflags
$rax = MOV64rr killed $rsi
RET64 killed $rax
...
Expand All @@ -45,8 +45,8 @@ body: |

; Verify that the register ties are preserved.
; CHECK-LABEL: name: test2
; CHECK: INLINEASM &foo, 0 /* attdialect */, 4784138 /* regdef:GR64 */, def $rsi, 4784138 /* regdef:GR64 */, def dead $rdi, 2147549193 /* reguse tiedto:$1 */, killed $rdi(tied-def 5), 2147483657 /* reguse tiedto:$0 */, killed $rsi(tied-def 3), 12 /* clobber */, implicit-def dead early-clobber $eflags
INLINEASM &foo, 0, 4784138, def $rsi, 4784138, def dead $rdi, 2147549193, killed $rdi(tied-def 5), 2147483657, killed $rsi(tied-def 3), 12, implicit-def dead early-clobber $eflags
; CHECK: INLINEASM &foo, 0 /* attdialect */, 4390922 /* regdef:GR64 */, def $rsi, 4390922 /* regdef:GR64 */, def dead $rdi, 2147549193 /* reguse tiedto:$1 */, killed $rdi(tied-def 5), 2147483657 /* reguse tiedto:$0 */, killed $rsi(tied-def 3), 12 /* clobber */, implicit-def dead early-clobber $eflags
INLINEASM &foo, 0, 4390922, def $rsi, 4390922, def dead $rdi, 2147549193, killed $rdi(tied-def 5), 2147483657, killed $rsi(tied-def 3), 12, implicit-def dead early-clobber $eflags
$rax = MOV64rr killed $rsi
RET64 killed $rax
...
14 changes: 0 additions & 14 deletions llvm/test/CodeGen/MIR2Vec/Inputs/reference_x86_vocab_print.txt
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Expand Up @@ -6930,18 +6930,14 @@ Key: PhyReg_VK2PAIR: [ 0.00 0.00 ]
Key: PhyReg_VK4PAIR: [ 0.00 0.00 ]
Key: PhyReg_VK8PAIR: [ 0.00 0.00 ]
Key: PhyReg_VK1PAIR_with_sub_mask_0_in_VK1WM: [ 0.00 0.00 ]
Key: PhyReg_LOW32_ADDR_ACCESS_RBP: [ 0.00 0.00 ]
Key: PhyReg_LOW32_ADDR_ACCESS: [ 0.00 0.00 ]
Key: PhyReg_LOW32_ADDR_ACCESS_RBP_with_sub_8bit: [ 0.00 0.00 ]
Key: PhyReg_FR32X: [ 0.00 0.00 ]
Key: PhyReg_GR32: [ 0.50 0.50 ]
Key: PhyReg_GR32_NOSP: [ 0.00 0.00 ]
Key: PhyReg_LOW32_ADDR_ACCESS_RBP_with_sub_16bit_in_GR16_NOREX2: [ 0.00 0.00 ]
Key: PhyReg_DEBUG_REG: [ 0.00 0.00 ]
Key: PhyReg_FR32: [ 0.00 0.00 ]
Key: PhyReg_GR32_NOREX2: [ 0.00 0.00 ]
Key: PhyReg_GR32_NOREX2_NOSP: [ 0.00 0.00 ]
Key: PhyReg_LOW32_ADDR_ACCESS_RBP_with_sub_16bit_in_GR16_NOREX: [ 0.00 0.00 ]
Key: PhyReg_GR32_NOREX: [ 0.00 0.00 ]
Key: PhyReg_VK32: [ 0.00 0.00 ]
Key: PhyReg_GR32_NOREX_NOSP: [ 0.00 0.00 ]
Expand All @@ -6958,7 +6954,6 @@ Key: PhyReg_GR32_CB: [ 0.00 0.00 ]
Key: PhyReg_GR32_DC: [ 0.00 0.00 ]
Key: PhyReg_GR32_DIBP: [ 0.00 0.00 ]
Key: PhyReg_GR32_SIDI: [ 0.00 0.00 ]
Key: PhyReg_LOW32_ADDR_ACCESS_RBP_with_sub_32bit: [ 0.00 0.00 ]
Key: PhyReg_CCR: [ 0.00 0.00 ]
Key: PhyReg_DFCCR: [ 0.00 0.00 ]
Key: PhyReg_GR32_ABCD_and_GR32_BSI: [ 0.00 0.00 ]
Expand All @@ -6968,7 +6963,6 @@ Key: PhyReg_GR32_BPSP_and_GR32_DIBP: [ 0.00 0.00 ]
Key: PhyReg_GR32_BPSP_and_GR32_TC: [ 0.00 0.00 ]
Key: PhyReg_GR32_BSI_and_GR32_SIDI: [ 0.00 0.00 ]
Key: PhyReg_GR32_DIBP_and_GR32_SIDI: [ 0.00 0.00 ]
Key: PhyReg_LOW32_ADDR_ACCESS_RBP_with_sub_8bit_with_sub_32bit: [ 0.00 0.00 ]
Key: PhyReg_LOW32_ADDR_ACCESS_with_sub_32bit: [ 0.00 0.00 ]
Key: PhyReg_RFP64: [ 0.00 0.00 ]
Key: PhyReg_GR64: [ 0.60 0.60 ]
Expand Down Expand Up @@ -7007,7 +7001,6 @@ Key: PhyReg_GR64_with_sub_32bit_in_GR32_TC: [ 0.00 0.00 ]
Key: PhyReg_GR64_with_sub_32bit_in_GR32_ABCD_and_GR32_TC: [ 0.00 0.00 ]
Key: PhyReg_GR64_AD: [ 0.00 0.00 ]
Key: PhyReg_GR64_ArgRef: [ 0.00 0.00 ]
Key: PhyReg_GR64_and_LOW32_ADDR_ACCESS_RBP: [ 0.00 0.00 ]
Key: PhyReg_GR64_with_sub_32bit_in_GR32_ArgRef: [ 0.00 0.00 ]
Key: PhyReg_GR64_with_sub_32bit_in_GR32_BPSP: [ 0.00 0.00 ]
Key: PhyReg_GR64_with_sub_32bit_in_GR32_BSI: [ 0.00 0.00 ]
Expand Down Expand Up @@ -7066,18 +7059,14 @@ Key: VirtReg_VK2PAIR: [ 0.00 0.00 ]
Key: VirtReg_VK4PAIR: [ 0.00 0.00 ]
Key: VirtReg_VK8PAIR: [ 0.00 0.00 ]
Key: VirtReg_VK1PAIR_with_sub_mask_0_in_VK1WM: [ 0.00 0.00 ]
Key: VirtReg_LOW32_ADDR_ACCESS_RBP: [ 0.00 0.00 ]
Key: VirtReg_LOW32_ADDR_ACCESS: [ 0.00 0.00 ]
Key: VirtReg_LOW32_ADDR_ACCESS_RBP_with_sub_8bit: [ 0.00 0.00 ]
Key: VirtReg_FR32X: [ 0.00 0.00 ]
Key: VirtReg_GR32: [ 0.80 0.80 ]
Key: VirtReg_GR32_NOSP: [ 0.00 0.00 ]
Key: VirtReg_LOW32_ADDR_ACCESS_RBP_with_sub_16bit_in_GR16_NOREX2: [ 0.00 0.00 ]
Key: VirtReg_DEBUG_REG: [ 0.00 0.00 ]
Key: VirtReg_FR32: [ 0.00 0.00 ]
Key: VirtReg_GR32_NOREX2: [ 0.00 0.00 ]
Key: VirtReg_GR32_NOREX2_NOSP: [ 0.00 0.00 ]
Key: VirtReg_LOW32_ADDR_ACCESS_RBP_with_sub_16bit_in_GR16_NOREX: [ 0.00 0.00 ]
Key: VirtReg_GR32_NOREX: [ 0.00 0.00 ]
Key: VirtReg_VK32: [ 0.00 0.00 ]
Key: VirtReg_GR32_NOREX_NOSP: [ 0.00 0.00 ]
Expand All @@ -7094,7 +7083,6 @@ Key: VirtReg_GR32_CB: [ 0.00 0.00 ]
Key: VirtReg_GR32_DC: [ 0.00 0.00 ]
Key: VirtReg_GR32_DIBP: [ 0.00 0.00 ]
Key: VirtReg_GR32_SIDI: [ 0.00 0.00 ]
Key: VirtReg_LOW32_ADDR_ACCESS_RBP_with_sub_32bit: [ 0.00 0.00 ]
Key: VirtReg_CCR: [ 0.00 0.00 ]
Key: VirtReg_DFCCR: [ 0.00 0.00 ]
Key: VirtReg_GR32_ABCD_and_GR32_BSI: [ 0.00 0.00 ]
Expand All @@ -7104,7 +7092,6 @@ Key: VirtReg_GR32_BPSP_and_GR32_DIBP: [ 0.00 0.00 ]
Key: VirtReg_GR32_BPSP_and_GR32_TC: [ 0.00 0.00 ]
Key: VirtReg_GR32_BSI_and_GR32_SIDI: [ 0.00 0.00 ]
Key: VirtReg_GR32_DIBP_and_GR32_SIDI: [ 0.00 0.00 ]
Key: VirtReg_LOW32_ADDR_ACCESS_RBP_with_sub_8bit_with_sub_32bit: [ 0.00 0.00 ]
Key: VirtReg_LOW32_ADDR_ACCESS_with_sub_32bit: [ 0.00 0.00 ]
Key: VirtReg_RFP64: [ 0.00 0.00 ]
Key: VirtReg_GR64: [ 0.90 0.90 ]
Expand Down Expand Up @@ -7143,7 +7130,6 @@ Key: VirtReg_GR64_with_sub_32bit_in_GR32_TC: [ 0.00 0.00 ]
Key: VirtReg_GR64_with_sub_32bit_in_GR32_ABCD_and_GR32_TC: [ 0.00 0.00 ]
Key: VirtReg_GR64_AD: [ 0.00 0.00 ]
Key: VirtReg_GR64_ArgRef: [ 0.00 0.00 ]
Key: VirtReg_GR64_and_LOW32_ADDR_ACCESS_RBP: [ 0.00 0.00 ]
Key: VirtReg_GR64_with_sub_32bit_in_GR32_ArgRef: [ 0.00 0.00 ]
Key: VirtReg_GR64_with_sub_32bit_in_GR32_BPSP: [ 0.00 0.00 ]
Key: VirtReg_GR64_with_sub_32bit_in_GR32_BSI: [ 0.00 0.00 ]
Expand Down
14 changes: 0 additions & 14 deletions llvm/test/CodeGen/MIR2Vec/Inputs/reference_x86_vocab_wo=0.5_print.txt
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Original file line number Diff line number Diff line change
Expand Up @@ -6930,18 +6930,14 @@ Key: PhyReg_VK2PAIR: [ 0.00 0.00 ]
Key: PhyReg_VK4PAIR: [ 0.00 0.00 ]
Key: PhyReg_VK8PAIR: [ 0.00 0.00 ]
Key: PhyReg_VK1PAIR_with_sub_mask_0_in_VK1WM: [ 0.00 0.00 ]
Key: PhyReg_LOW32_ADDR_ACCESS_RBP: [ 0.00 0.00 ]
Key: PhyReg_LOW32_ADDR_ACCESS: [ 0.00 0.00 ]
Key: PhyReg_LOW32_ADDR_ACCESS_RBP_with_sub_8bit: [ 0.00 0.00 ]
Key: PhyReg_FR32X: [ 0.00 0.00 ]
Key: PhyReg_GR32: [ 0.50 0.50 ]
Key: PhyReg_GR32_NOSP: [ 0.00 0.00 ]
Key: PhyReg_LOW32_ADDR_ACCESS_RBP_with_sub_16bit_in_GR16_NOREX2: [ 0.00 0.00 ]
Key: PhyReg_DEBUG_REG: [ 0.00 0.00 ]
Key: PhyReg_FR32: [ 0.00 0.00 ]
Key: PhyReg_GR32_NOREX2: [ 0.00 0.00 ]
Key: PhyReg_GR32_NOREX2_NOSP: [ 0.00 0.00 ]
Key: PhyReg_LOW32_ADDR_ACCESS_RBP_with_sub_16bit_in_GR16_NOREX: [ 0.00 0.00 ]
Key: PhyReg_GR32_NOREX: [ 0.00 0.00 ]
Key: PhyReg_VK32: [ 0.00 0.00 ]
Key: PhyReg_GR32_NOREX_NOSP: [ 0.00 0.00 ]
Expand All @@ -6958,7 +6954,6 @@ Key: PhyReg_GR32_CB: [ 0.00 0.00 ]
Key: PhyReg_GR32_DC: [ 0.00 0.00 ]
Key: PhyReg_GR32_DIBP: [ 0.00 0.00 ]
Key: PhyReg_GR32_SIDI: [ 0.00 0.00 ]
Key: PhyReg_LOW32_ADDR_ACCESS_RBP_with_sub_32bit: [ 0.00 0.00 ]
Key: PhyReg_CCR: [ 0.00 0.00 ]
Key: PhyReg_DFCCR: [ 0.00 0.00 ]
Key: PhyReg_GR32_ABCD_and_GR32_BSI: [ 0.00 0.00 ]
Expand All @@ -6968,7 +6963,6 @@ Key: PhyReg_GR32_BPSP_and_GR32_DIBP: [ 0.00 0.00 ]
Key: PhyReg_GR32_BPSP_and_GR32_TC: [ 0.00 0.00 ]
Key: PhyReg_GR32_BSI_and_GR32_SIDI: [ 0.00 0.00 ]
Key: PhyReg_GR32_DIBP_and_GR32_SIDI: [ 0.00 0.00 ]
Key: PhyReg_LOW32_ADDR_ACCESS_RBP_with_sub_8bit_with_sub_32bit: [ 0.00 0.00 ]
Key: PhyReg_LOW32_ADDR_ACCESS_with_sub_32bit: [ 0.00 0.00 ]
Key: PhyReg_RFP64: [ 0.00 0.00 ]
Key: PhyReg_GR64: [ 0.60 0.60 ]
Expand Down Expand Up @@ -7007,7 +7001,6 @@ Key: PhyReg_GR64_with_sub_32bit_in_GR32_TC: [ 0.00 0.00 ]
Key: PhyReg_GR64_with_sub_32bit_in_GR32_ABCD_and_GR32_TC: [ 0.00 0.00 ]
Key: PhyReg_GR64_AD: [ 0.00 0.00 ]
Key: PhyReg_GR64_ArgRef: [ 0.00 0.00 ]
Key: PhyReg_GR64_and_LOW32_ADDR_ACCESS_RBP: [ 0.00 0.00 ]
Key: PhyReg_GR64_with_sub_32bit_in_GR32_ArgRef: [ 0.00 0.00 ]
Key: PhyReg_GR64_with_sub_32bit_in_GR32_BPSP: [ 0.00 0.00 ]
Key: PhyReg_GR64_with_sub_32bit_in_GR32_BSI: [ 0.00 0.00 ]
Expand Down Expand Up @@ -7066,18 +7059,14 @@ Key: VirtReg_VK2PAIR: [ 0.00 0.00 ]
Key: VirtReg_VK4PAIR: [ 0.00 0.00 ]
Key: VirtReg_VK8PAIR: [ 0.00 0.00 ]
Key: VirtReg_VK1PAIR_with_sub_mask_0_in_VK1WM: [ 0.00 0.00 ]
Key: VirtReg_LOW32_ADDR_ACCESS_RBP: [ 0.00 0.00 ]
Key: VirtReg_LOW32_ADDR_ACCESS: [ 0.00 0.00 ]
Key: VirtReg_LOW32_ADDR_ACCESS_RBP_with_sub_8bit: [ 0.00 0.00 ]
Key: VirtReg_FR32X: [ 0.00 0.00 ]
Key: VirtReg_GR32: [ 0.80 0.80 ]
Key: VirtReg_GR32_NOSP: [ 0.00 0.00 ]
Key: VirtReg_LOW32_ADDR_ACCESS_RBP_with_sub_16bit_in_GR16_NOREX2: [ 0.00 0.00 ]
Key: VirtReg_DEBUG_REG: [ 0.00 0.00 ]
Key: VirtReg_FR32: [ 0.00 0.00 ]
Key: VirtReg_GR32_NOREX2: [ 0.00 0.00 ]
Key: VirtReg_GR32_NOREX2_NOSP: [ 0.00 0.00 ]
Key: VirtReg_LOW32_ADDR_ACCESS_RBP_with_sub_16bit_in_GR16_NOREX: [ 0.00 0.00 ]
Key: VirtReg_GR32_NOREX: [ 0.00 0.00 ]
Key: VirtReg_VK32: [ 0.00 0.00 ]
Key: VirtReg_GR32_NOREX_NOSP: [ 0.00 0.00 ]
Expand All @@ -7094,7 +7083,6 @@ Key: VirtReg_GR32_CB: [ 0.00 0.00 ]
Key: VirtReg_GR32_DC: [ 0.00 0.00 ]
Key: VirtReg_GR32_DIBP: [ 0.00 0.00 ]
Key: VirtReg_GR32_SIDI: [ 0.00 0.00 ]
Key: VirtReg_LOW32_ADDR_ACCESS_RBP_with_sub_32bit: [ 0.00 0.00 ]
Key: VirtReg_CCR: [ 0.00 0.00 ]
Key: VirtReg_DFCCR: [ 0.00 0.00 ]
Key: VirtReg_GR32_ABCD_and_GR32_BSI: [ 0.00 0.00 ]
Expand All @@ -7104,7 +7092,6 @@ Key: VirtReg_GR32_BPSP_and_GR32_DIBP: [ 0.00 0.00 ]
Key: VirtReg_GR32_BPSP_and_GR32_TC: [ 0.00 0.00 ]
Key: VirtReg_GR32_BSI_and_GR32_SIDI: [ 0.00 0.00 ]
Key: VirtReg_GR32_DIBP_and_GR32_SIDI: [ 0.00 0.00 ]
Key: VirtReg_LOW32_ADDR_ACCESS_RBP_with_sub_8bit_with_sub_32bit: [ 0.00 0.00 ]
Key: VirtReg_LOW32_ADDR_ACCESS_with_sub_32bit: [ 0.00 0.00 ]
Key: VirtReg_RFP64: [ 0.00 0.00 ]
Key: VirtReg_GR64: [ 0.90 0.90 ]
Expand Down Expand Up @@ -7143,7 +7130,6 @@ Key: VirtReg_GR64_with_sub_32bit_in_GR32_TC: [ 0.00 0.00 ]
Key: VirtReg_GR64_with_sub_32bit_in_GR32_ABCD_and_GR32_TC: [ 0.00 0.00 ]
Key: VirtReg_GR64_AD: [ 0.00 0.00 ]
Key: VirtReg_GR64_ArgRef: [ 0.00 0.00 ]
Key: VirtReg_GR64_and_LOW32_ADDR_ACCESS_RBP: [ 0.00 0.00 ]
Key: VirtReg_GR64_with_sub_32bit_in_GR32_ArgRef: [ 0.00 0.00 ]
Key: VirtReg_GR64_with_sub_32bit_in_GR32_BPSP: [ 0.00 0.00 ]
Key: VirtReg_GR64_with_sub_32bit_in_GR32_BSI: [ 0.00 0.00 ]
Expand Down
8 changes: 4 additions & 4 deletions llvm/test/CodeGen/X86/GlobalISel/select-copy.mir
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Expand Up @@ -185,16 +185,16 @@ regBankSelected: true
# ALL: registers:
# ALL-NEXT: - { id: 0, class: gr32, preferred-register: '', flags: [ ] }
# ALL-NEXT: - { id: 1, class: gr16, preferred-register: '', flags: [ ] }
# ALL-NEXT: - { id: 2, class: low32_addr_access_rbp, preferred-register: '', flags: [ ] }
# ALL-NEXT: - { id: 3, class: low32_addr_access_rbp, preferred-register: '', flags: [ ] }
# ALL-NEXT: - { id: 2, class: low32_addr_access, preferred-register: '', flags: [ ] }
# ALL-NEXT: - { id: 3, class: low32_addr_access, preferred-register: '', flags: [ ] }
registers:
- { id: 0, class: gpr, preferred-register: '' }
- { id: 1, class: gpr, preferred-register: '' }
- { id: 2, class: gpr, preferred-register: '' }
# ALL: %0:gr32 = COPY $edx
# ALL-NEXT: %1:gr16 = COPY %0.sub_16bit
# ALL-NEXT: %3:low32_addr_access_rbp = IMPLICIT_DEF
# ALL-NEXT: %2:low32_addr_access_rbp = INSERT_SUBREG %3, %1, %subreg.sub_16bit
# ALL-NEXT: %3:low32_addr_access = IMPLICIT_DEF
# ALL-NEXT: %2:low32_addr_access = INSERT_SUBREG %3, %1, %subreg.sub_16bit
# ALL-NEXT: $eax = COPY %2
# ALL-NEXT: RET 0, implicit $eax
body: |
Expand Down
8 changes: 4 additions & 4 deletions llvm/test/CodeGen/X86/GlobalISel/select-ext.mir
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Expand Up @@ -448,15 +448,15 @@ body: |
; X86-LABEL: name: test_anyext_i16toi32
; X86: [[COPY:%[0-9]+]]:gr32 = COPY $edi
; X86-NEXT: [[COPY1:%[0-9]+]]:gr16 = COPY [[COPY]].sub_16bit
; X86-NEXT: [[DEF:%[0-9]+]]:low32_addr_access_rbp = IMPLICIT_DEF
; X86-NEXT: [[INSERT_SUBREG:%[0-9]+]]:low32_addr_access_rbp = INSERT_SUBREG [[DEF]], [[COPY1]], %subreg.sub_16bit
; X86-NEXT: [[DEF:%[0-9]+]]:low32_addr_access = IMPLICIT_DEF
; X86-NEXT: [[INSERT_SUBREG:%[0-9]+]]:low32_addr_access = INSERT_SUBREG [[DEF]], [[COPY1]], %subreg.sub_16bit
; X86-NEXT: $eax = COPY [[INSERT_SUBREG]]
; X86-NEXT: RET 0, implicit $eax
; X64-LABEL: name: test_anyext_i16toi32
; X64: [[COPY:%[0-9]+]]:gr32 = COPY $edi
; X64-NEXT: [[COPY1:%[0-9]+]]:gr16 = COPY [[COPY]].sub_16bit
; X64-NEXT: [[DEF:%[0-9]+]]:low32_addr_access_rbp = IMPLICIT_DEF
; X64-NEXT: [[INSERT_SUBREG:%[0-9]+]]:low32_addr_access_rbp = INSERT_SUBREG [[DEF]], [[COPY1]], %subreg.sub_16bit
; X64-NEXT: [[DEF:%[0-9]+]]:low32_addr_access = IMPLICIT_DEF
; X64-NEXT: [[INSERT_SUBREG:%[0-9]+]]:low32_addr_access = INSERT_SUBREG [[DEF]], [[COPY1]], %subreg.sub_16bit
; X64-NEXT: $eax = COPY [[INSERT_SUBREG]]
; X64-NEXT: RET 0, implicit $eax
%0(s32) = COPY $edi
Expand Down
83 changes: 41 additions & 42 deletions llvm/test/CodeGen/X86/abds-neg.ll
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Expand Up @@ -655,52 +655,51 @@ define i128 @abd_minmax_i128(i128 %a, i128 %b) nounwind {
; X86-NEXT: pushl %esi
; X86-NEXT: andl $-16, %esp
; X86-NEXT: subl $16, %esp
; X86-NEXT: movl 40(%ebp), %esi
; X86-NEXT: movl 24(%ebp), %edi
; X86-NEXT: movl 28(%ebp), %eax
; X86-NEXT: cmpl %esi, %edi
; X86-NEXT: sbbl 44(%ebp), %eax
; X86-NEXT: movl 48(%ebp), %edx
; X86-NEXT: movl 32(%ebp), %eax
; X86-NEXT: sbbl %edx, %eax
; X86-NEXT: movl 52(%ebp), %ebx
; X86-NEXT: movl 36(%ebp), %ecx
; X86-NEXT: movl %ecx, %eax
; X86-NEXT: sbbl %ebx, %eax
; X86-NEXT: movl %ebx, %eax
; X86-NEXT: cmovll %ecx, %eax
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movl %edx, %eax
; X86-NEXT: cmovll 32(%ebp), %eax
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movl 44(%ebp), %eax
; X86-NEXT: cmovll 28(%ebp), %eax
; X86-NEXT: movl %esi, %ecx
; X86-NEXT: cmovll %edi, %ecx
; X86-NEXT: cmpl %edi, %esi
; X86-NEXT: movl 40(%ebp), %eax
; X86-NEXT: movl 44(%ebp), %edi
; X86-NEXT: sbbl 28(%ebp), %edi
; X86-NEXT: movl %edx, %edi
; X86-NEXT: sbbl 32(%ebp), %edi
; X86-NEXT: movl %ebx, %edi
; X86-NEXT: sbbl 36(%ebp), %edi
; X86-NEXT: movl 24(%ebp), %esi
; X86-NEXT: movl 28(%ebp), %ecx
; X86-NEXT: cmpl %eax, %esi
; X86-NEXT: sbbl %edi, %ecx
; X86-NEXT: movl 32(%ebp), %ecx
; X86-NEXT: sbbl 48(%ebp), %ecx
; X86-NEXT: movl 52(%ebp), %ebx
; X86-NEXT: movl 36(%ebp), %edx
; X86-NEXT: movl %edx, %ecx
; X86-NEXT: sbbl %ebx, %ecx
; X86-NEXT: movl %ebx, %ecx
; X86-NEXT: cmovll %edx, %ecx
; X86-NEXT: movl %ecx, 8(%esp) # 4-byte Spill
; X86-NEXT: movl 48(%ebp), %ecx
; X86-NEXT: cmovll 32(%ebp), %ecx
; X86-NEXT: movl %ecx, 4(%esp) # 4-byte Spill
; X86-NEXT: movl %edi, %ecx
; X86-NEXT: cmovll 28(%ebp), %ecx
; X86-NEXT: movl %eax, %edx
; X86-NEXT: cmovll %esi, %edx
; X86-NEXT: cmpl %esi, %eax
; X86-NEXT: movl %edi, %esi
; X86-NEXT: sbbl 28(%ebp), %esi
; X86-NEXT: movl 48(%ebp), %esi
; X86-NEXT: sbbl 32(%ebp), %esi
; X86-NEXT: movl %ebx, %esi
; X86-NEXT: sbbl 36(%ebp), %esi
; X86-NEXT: cmovll 36(%ebp), %ebx
; X86-NEXT: cmovll 32(%ebp), %edx
; X86-NEXT: movl 44(%ebp), %edi
; X86-NEXT: movl 48(%ebp), %esi
; X86-NEXT: cmovll 32(%ebp), %esi
; X86-NEXT: cmovll 28(%ebp), %edi
; X86-NEXT: cmovll 24(%ebp), %esi
; X86-NEXT: subl %esi, %ecx
; X86-NEXT: sbbl %edi, %eax
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X86-NEXT: sbbl %edx, %edi
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X86-NEXT: cmovll 24(%ebp), %eax
; X86-NEXT: subl %eax, %edx
; X86-NEXT: sbbl %edi, %ecx
; X86-NEXT: movl 4(%esp), %edi # 4-byte Reload
; X86-NEXT: sbbl %esi, %edi
; X86-NEXT: movl 8(%esp), %esi # 4-byte Reload
; X86-NEXT: sbbl %ebx, %esi
; X86-NEXT: movl 8(%ebp), %edx
; X86-NEXT: movl %ecx, (%edx)
; X86-NEXT: movl %eax, 4(%edx)
; X86-NEXT: movl %edi, 8(%edx)
; X86-NEXT: movl %esi, 12(%edx)
; X86-NEXT: movl %edx, %eax
; X86-NEXT: movl 8(%ebp), %eax
; X86-NEXT: movl %edx, (%eax)
; X86-NEXT: movl %ecx, 4(%eax)
; X86-NEXT: movl %edi, 8(%eax)
; X86-NEXT: movl %esi, 12(%eax)
; X86-NEXT: leal -12(%ebp), %esp
; X86-NEXT: popl %esi
; X86-NEXT: popl %edi
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