[RISCV] Adding vlenb register as callee register

[barsolo2000]

In recent debug sessions we noticed that GDB debugger is showing more stack trace than lldb.
After enabling unwinding log, it seems like the issue is that the CFA is dependent on the value of vlenb.
vlenb doesn't change in runtime so we can assume its value from frame 0.

[llvmbot]

@llvm/pr-subscribers-backend-risc-v

@llvm/pr-subscribers-lldb

Author: None (barsolo2000)

Changes

In recent debug sessions we noticed that GDB debugger is showing more stack trace and lldb.
After enabling unwinding log, it seems like the issue is that the CFA is dependent on the value of vlenb.
vlenb doesn't change in runtime so we can assume its value from frame 0.

---

Full diff: https://github.com/llvm/llvm-project/pull/165796.diff

1 Files Affected:

• (modified) lldb/source/Plugins/ABI/RISCV/ABISysV_riscv.cpp (+2)

diff --git a/lldb/source/Plugins/ABI/RISCV/ABISysV_riscv.cpp b/lldb/source/Plugins/ABI/RISCV/ABISysV_riscv.cpp
index b313ca03fb970..d46593358ba6d 100644
--- a/lldb/source/Plugins/ABI/RISCV/ABISysV_riscv.cpp
+++ b/lldb/source/Plugins/ABI/RISCV/ABISysV_riscv.cpp
@@ -798,6 +798,8 @@ bool ABISysV_riscv::RegisterIsCalleeSaved(const RegisterInfo *reg_info) {
           // floating point hardware names
           .Cases("f8", "f9", "f18", "f19", "f20", "f21", "f22", "f23", is_hw_fp)
           .Cases("f24", "f25", "f26", "f27", is_hw_fp)
+          // vlenb is constant and needed for vector unwinding.
+          .Case("vlenb", true)
           .Default(false);
 
   return is_callee_saved;