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[NFC][SPIRV] Add AMDGCN SPIR-V specific defaults to the BE #165815

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Merged
merged 18 commits into from
Nov 4, 2025
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Merged

[NFC][SPIRV] Add AMDGCN SPIR-V specific defaults to the BE #165815

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3e0abe1
Add pass which forwards unimplemented math builtins / libcalls to the…
AlexVlx May 15, 2025
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Merge branch 'main' of https://github.com/llvm/llvm-project
AlexVlx May 16, 2025
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Merge branch 'main' of https://github.com/llvm/llvm-project
AlexVlx Jun 11, 2025
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Merge branch 'main' of https://github.com/llvm/llvm-project
AlexVlx Jul 15, 2025
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Merge branch 'main' of https://github.com/llvm/llvm-project
AlexVlx Aug 18, 2025
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Merge branch 'main' of https://github.com/llvm/llvm-project
AlexVlx Aug 20, 2025
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Merge branch 'main' of https://github.com/llvm/llvm-project
AlexVlx Sep 23, 2025
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Merge branch 'main' of https://github.com/llvm/llvm-project
AlexVlx Oct 3, 2025
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Merge branch 'main' of https://github.com/llvm/llvm-project
AlexVlx Oct 5, 2025
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Merge branch 'main' of https://github.com/llvm/llvm-project
AlexVlx Oct 6, 2025
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Merge branch 'main' of https://github.com/llvm/llvm-project
AlexVlx Oct 30, 2025
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Merge branch 'main' of https://github.com/llvm/llvm-project
AlexVlx Oct 31, 2025
2e9bc21
Add AMDGCN flavoured SPIR-V specific bits to the BE: generator number…
AlexVlx Oct 31, 2025
a6d9df5
Merge remote-tracking branch 'upstream/main' into spirv_be_staging
AlexVlx Oct 31, 2025
00ffdaa
Fix formatting.
AlexVlx Oct 31, 2025
acd6bb0
Fix bug.
AlexVlx Oct 31, 2025
94cad95
Reformat switch for readability.
AlexVlx Oct 31, 2025
b749107
Merge branch 'main' into spirv_be_staging
AlexVlx Nov 4, 2025
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7 changes: 5 additions & 2 deletions llvm/lib/MC/SPIRVObjectWriter.cpp
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Expand Up @@ -7,6 +7,7 @@
//===----------------------------------------------------------------------===//

#include "llvm/MC/MCAssembler.h"
#include "llvm/MC/MCContext.h"
#include "llvm/MC/MCSPIRVObjectWriter.h"
#include "llvm/MC/MCSection.h"
#include "llvm/MC/MCValue.h"
Expand All @@ -17,8 +18,10 @@ using namespace llvm;
void SPIRVObjectWriter::writeHeader(const MCAssembler &Asm) {
constexpr uint32_t MagicNumber = 0x07230203;
constexpr uint32_t GeneratorID = 43;
constexpr uint32_t GeneratorMagicNumber =
(GeneratorID << 16) | (LLVM_VERSION_MAJOR);
const uint32_t GeneratorMagicNumber =
Asm.getContext().getTargetTriple().getVendor() == Triple::AMD
? UINT16_MAX
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@Keenuts Keenuts Nov 3, 2025

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nit: Isn't AMD's generator magic number 10?

https://github.com/KhronosGroup/SPIRV-Headers/blob/f2e4bd213104fe323a01e935df56557328d37ac8/include/spirv/spir-v.xml#L34

: ((GeneratorID << 16) | (LLVM_VERSION_MAJOR));
constexpr uint32_t Schema = 0;

W.write<uint32_t>(MagicNumber);
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11 changes: 9 additions & 2 deletions llvm/lib/Target/SPIRV/SPIRVSubtarget.cpp
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Expand Up @@ -70,7 +70,6 @@ SPIRVSubtarget::SPIRVSubtarget(const Triple &TT, const std::string &CPU,
SPIRVVersion = VersionTuple(1, 3);
break;
case Triple::SPIRVSubArch_v14:
default:
SPIRVVersion = VersionTuple(1, 4);
break;
case Triple::SPIRVSubArch_v15:
Expand All @@ -79,20 +78,28 @@ SPIRVSubtarget::SPIRVSubtarget(const Triple &TT, const std::string &CPU,
case Triple::SPIRVSubArch_v16:
SPIRVVersion = VersionTuple(1, 6);
break;
default:
if (TT.getVendor() == Triple::AMD)
SPIRVVersion = VersionTuple(1, 6);
else
SPIRVVersion = VersionTuple(1, 4);
}
OpenCLVersion = VersionTuple(2, 2);

// Set the environment based on the target triple.
if (TargetTriple.getOS() == Triple::Vulkan)
Env = Shader;
else if (TargetTriple.getEnvironment() == Triple::OpenCL)
else if (TargetTriple.getEnvironment() == Triple::OpenCL ||
TargetTriple.getVendor() == Triple::AMD)
Env = Kernel;
else
Env = Unknown;

// Set the default extensions based on the target triple.
if (TargetTriple.getVendor() == Triple::Intel)
Extensions.insert(SPIRV::Extension::SPV_INTEL_function_pointers);
if (TargetTriple.getVendor() == Triple::AMD)
Extensions = SPIRVExtensionsParser::getValidExtensions(TargetTriple);

// The order of initialization is important.
initAvailableExtensions(Extensions);
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3 changes: 2 additions & 1 deletion llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
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Expand Up @@ -244,7 +244,8 @@ static cl::opt<bool> SPVEnableNonSemanticDI(
cl::Optional, cl::init(false));

void SPIRVPassConfig::addPreEmitPass() {
if (SPVEnableNonSemanticDI) {
if (SPVEnableNonSemanticDI ||
getSPIRVTargetMachine().getTargetTriple().getVendor() == Triple::AMD) {
Comment on lines +247 to +248
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@jmmartinez jmmartinez Oct 31, 2025 •
edited
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I wonder if this condition can be moved inside the pass. Maybe in the future... (or may be we can turn it on from the driver).

addPass(createSPIRVEmitNonSemanticDIPass(&getTM<SPIRVTargetMachine>()));
}
}
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4 changes: 3 additions & 1 deletion llvm/test/CodeGen/SPIRV/debug-info/debug-type-pointer.ll
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@@ -1,7 +1,9 @@
; RUN: llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info --print-after=spirv-nonsemantic-debug-info -O0 -mtriple=spirv64-unknown-unknown %s -o - 2>&1 | FileCheck %s --check-prefix=CHECK-MIR
; RUN: llc --verify-machineinstrs --print-after=spirv-nonsemantic-debug-info -O0 -mtriple=spirv64-amd-amdhsa %s -o - 2>&1 | FileCheck %s --check-prefix=CHECK-MIR
; RUN: llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info -O0 -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s --check-prefix=CHECK-SPIRV
; RUN: llc --verify-machineinstrs -O0 -mtriple=spirv64-amd-amdhsa %s -o - | FileCheck %s --check-prefix=CHECK-SPIRV
; RUN: llc --verify-machineinstrs -O0 -mtriple=spirv64-unknown-unknown --spirv-ext=+SPV_KHR_non_semantic_info %s -o - | FileCheck %s --check-prefix=CHECK-OPTION
; TODO(#109287): When type is void * the spirv-val raises an error when DebugInfoNone is set as <id> Base Type argument of DebugTypePointer.
; TODO(#109287): When type is void * the spirv-val raises an error when DebugInfoNone is set as <id> Base Type argument of DebugTypePointer.
; DISABLED: %if spirv-tools %{ llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info -O0 -mtriple=spirv64-unknown-unknown %s -o - -filetype=obj | spirv-val %}

; CHECK-MIR-DAG: [[i32type:%[0-9]+\:type]] = OpTypeInt 32, 0
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2 changes: 2 additions & 0 deletions llvm/test/CodeGen/SPIRV/extensions/SPV_EXT_optnone.ll
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Expand Up @@ -7,6 +7,8 @@
; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv64-unknown-unknown --spirv-ext=+SPV_EXT_optnone,+SPV_INTEL_optnone %s -o - | FileCheck %s --check-prefixes=CHECK-TWO-EXTENSIONS
; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv64-unknown-unknown --spirv-ext=all %s -o - | FileCheck %s --check-prefixes=CHECK-ALL-EXTENSIONS

; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv64-amd-amdhsa %s -o - | FileCheck %s --check-prefixes=CHECK-ALL-EXTENSIONS

; CHECK-EXTENSION: OpCapability OptNoneEXT
; CHECK-EXTENSION: OpExtension "SPV_EXT_optnone"
; CHECK-NO-EXTENSION-NOT: OpCapability OptNoneINTEL
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1 change: 1 addition & 0 deletions llvm/test/CodeGen/SPIRV/extensions/enable-all-extensions.ll
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@@ -1,4 +1,5 @@
; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv32-unknown-unknown --spirv-ext=all %s -o - | FileCheck %s
; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv64-amd-amdhsa %s -o - | FileCheck %s

define i6 @getConstantI6() {
ret i6 2
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2 changes: 2 additions & 0 deletions llvm/test/CodeGen/SPIRV/physical-layout/generator-magic-number.ll
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@@ -1,4 +1,6 @@
; REQUIRES: spirv-tools
; RUN: llc -O0 -mtriple=spirv-unknown-unknown %s -o - --filetype=obj | spirv-dis | FileCheck %s
; RUN: llc -O0 -mtriple=spirv64-amd-amdhsa %s -o - --filetype=obj | spirv-dis | FileCheck --check-prefix=AMDGCNSPIRV %s

; CHECK: Generator: {{.*}}{{43|LLVM SPIR-V Backend}}{{.*}}
; AMDGCNSPIRV: Generator: {{.*}}{{65535|LLVM SPIR-V Backend}}{{.*}}
2 changes: 2 additions & 0 deletions llvm/test/CodeGen/SPIRV/physical-layout/spirv-version.ll
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Expand Up @@ -6,6 +6,7 @@
; RUN: llc -O0 -mtriple=spirv64v1.4-unknown-unknown %s -o - --filetype=obj | spirv-dis | FileCheck %s --check-prefix=CHECK-SPIRV14
; RUN: llc -O0 -mtriple=spirv64v1.5-unknown-unknown %s -o - --filetype=obj | spirv-dis | FileCheck %s --check-prefix=CHECK-SPIRV15
; RUN: llc -O0 -mtriple=spirv64v1.6-unknown-unknown %s -o - --filetype=obj | spirv-dis | FileCheck %s --check-prefix=CHECK-SPIRV16
; RUN: llc -O0 -mtriple=spirv64-amd-amdhsa %s -o - --filetype=obj | spirv-dis | FileCheck %s --check-prefix=AMDGCNSPIRV
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@mgcarrasco mgcarrasco Oct 31, 2025

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Extremely minor: CHECK-AMDGCNSPIRV instead of AMDGCNSPIRV?


; CHECK-SPIRV10: Version: 1.0
; CHECK-SPIRV11: Version: 1.1
Expand All @@ -14,3 +15,4 @@
; CHECK-SPIRV14: Version: 1.4
; CHECK-SPIRV15: Version: 1.5
; CHECK-SPIRV16: Version: 1.6
; AMDGCNSPIRV: Version: 1.6