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[X86] combineTruncate - trunc(srl(load(p),amt)) -> load(p+amt/8) - ensure there isn't an interdependency between the load and amt #165850

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Merged
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Oct 31, 2025
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[X86] combineTruncate - trunc(srl(load(p),amt)) -> load(p+amt/8) - ensure there isn't an interdependency between the load and amt #165850

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4 changes: 3 additions & 1 deletion llvm/lib/Target/X86/X86ISelLowering.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -54768,9 +54768,11 @@ static SDValue combineTruncate(SDNode *N, SelectionDAG &DAG,
KnownBits KnownAmt = DAG.computeKnownBits(ShAmt);
// Check the shift amount is byte aligned.
// Check the truncation doesn't use any shifted in (zero) top bits.
// Check the shift amount doesn't depend on the original load.
if (KnownAmt.countMinTrailingZeros() >= 3 &&
KnownAmt.getMaxValue().ule(SrcVT.getSizeInBits() -
VT.getSizeInBits())) {
VT.getSizeInBits()) &&
!Ld->isPredecessorOf(ShAmt.getNode())) {
EVT PtrVT = Ld->getBasePtr().getValueType();
SDValue PtrBitOfs = DAG.getZExtOrTrunc(ShAmt, DL, PtrVT);
SDValue PtrByteOfs =
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26 changes: 26 additions & 0 deletions llvm/test/CodeGen/X86/pr165755.ll
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@@ -0,0 +1,26 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
; RUN: llc < %s -mtriple=i686-- | FileCheck %s --check-prefixes=X86
; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefixes=X64

define i32 @PR165755(ptr %p0) {
; X86-LABEL: PR165755:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl (%ecx), %eax
; X86-NEXT: movb $0, (%ecx)
; X86-NEXT: retl
;
; X64-LABEL: PR165755:
; X64: # %bb.0:
; X64-NEXT: movl (%rdi), %eax
; X64-NEXT: movb $0, (%rdi)
; X64-NEXT: retq
%ld64 = load i64, ptr %p0, align 8
store i8 0, ptr %p0, align 1
%ld32 = load i32, ptr %p0, align 8
%mask = and i32 %ld32, 32
%zext = zext i32 %mask to i64
%srl = lshr i64 %ld64, %zext
%res = trunc i64 %srl to i32
ret i32 %res
}
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