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@RKSimon RKSimon commented Oct 31, 2025

Bail out earlier to help us simplify the logic for the MOVMSK/PTEST/KORTEST lowering, this will hopefully make it easier to reuse this for wider types in a future patch.

…SoftFloat/NoImplicitFloat. NFC.

Bail out earlier to help us simplify the logic for the MOVMSK/PTEST/KORTEST lowering, this will hopefully make it easier to reuse this for wider types in a future patch.
@RKSimon RKSimon enabled auto-merge (squash) October 31, 2025 18:11
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llvmbot commented Oct 31, 2025

@llvm/pr-subscribers-backend-x86

Author: Simon Pilgrim (RKSimon)

Changes

Bail out earlier to help us simplify the logic for the MOVMSK/PTEST/KORTEST lowering, this will hopefully make it easier to reuse this for wider types in a future patch.


Full diff: https://github.com/llvm/llvm-project/pull/165897.diff

1 Files Affected:

  • (modified) llvm/lib/Target/X86/X86ISelLowering.cpp (+10-7)
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 007074c3ffc82..ad0a83eaf42ca 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -22861,6 +22861,13 @@ static SDValue combineVectorSizedSetCCEquality(EVT VT, SDValue X, SDValue Y,
   if (!OpVT.isScalarInteger() || OpSize < 128)
     return SDValue();
 
+  // Don't do this if we're not supposed to use the FPU.
+  bool NoImplicitFloatOps =
+      DAG.getMachineFunction().getFunction().hasFnAttribute(
+          Attribute::NoImplicitFloat);
+  if (Subtarget.useSoftFloat() || NoImplicitFloatOps)
+    return SDValue();
+
   // Ignore a comparison with zero because that gets special treatment in
   // EmitTest(). But make an exception for the special case of a pair of
   // logically-combined vector-sized operands compared to zero. This pattern may
@@ -22883,13 +22890,9 @@ static SDValue combineVectorSizedSetCCEquality(EVT VT, SDValue X, SDValue Y,
   // Use XOR (plus OR) and PTEST after SSE4.1 for 128/256-bit operands.
   // Use PCMPNEQ (plus OR) and KORTEST for 512-bit operands.
   // Otherwise use PCMPEQ (plus AND) and mask testing.
-  bool NoImplicitFloatOps =
-      DAG.getMachineFunction().getFunction().hasFnAttribute(
-          Attribute::NoImplicitFloat);
-  if (!Subtarget.useSoftFloat() && !NoImplicitFloatOps &&
-      ((OpSize == 128 && Subtarget.hasSSE2()) ||
-       (OpSize == 256 && Subtarget.hasAVX()) ||
-       (OpSize == 512 && Subtarget.useAVX512Regs()))) {
+  if ((OpSize == 128 && Subtarget.hasSSE2()) ||
+      (OpSize == 256 && Subtarget.hasAVX()) ||
+      (OpSize == 512 && Subtarget.useAVX512Regs())) {
     bool HasPT = Subtarget.hasSSE41();
 
     // PTEST and MOVMSK are slow on Knights Landing and Knights Mill and widened

@RKSimon RKSimon merged commit 269f264 into llvm:main Nov 1, 2025
9 of 10 checks passed
DEBADRIBASAK pushed a commit to DEBADRIBASAK/llvm-project that referenced this pull request Nov 3, 2025
…SoftFloat/NoImplicitFloat. NFC. (llvm#165897)

Bail out earlier to help us simplify the logic for the MOVMSK/PTEST/KORTEST lowering, this will hopefully make it easier to reuse this for wider types in a future patch.
@RKSimon RKSimon deleted the x86-ptest-no-fpu branch November 4, 2025 16:37
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