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[mlir][spirv] Fix Intel SubgroupBlock* op tests #166185

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merged 4 commits into from
Nov 3, 2025
Merged

[mlir][spirv] Fix Intel SubgroupBlock* op tests #166185

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8b7b1de
[mlir][spirv] Disable failing Intel SubgroupBlock* op tests
kuhar Nov 3, 2025
6dc9061
Fix tests
kuhar Nov 3, 2025
0504c0d
Clean up
kuhar Nov 3, 2025
72d14ac
Clean up
kuhar Nov 3, 2025
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30 changes: 4 additions & 26 deletions mlir/test/Target/SPIRV/group-ops.mlir
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Original file line number Diff line number Diff line change
@@ -1,11 +1,13 @@
// RUN: mlir-translate -no-implicit-module -test-spirv-roundtrip -split-input-file %s | FileCheck %s
// RUN: mlir-translate --no-implicit-module --test-spirv-roundtrip --split-input-file %s | FileCheck %s

// RUN: %if spirv-tools %{ rm -rf %t %}
// RUN: %if spirv-tools %{ mkdir %t %}
// RUN: %if spirv-tools %{ mlir-translate --no-implicit-module --serialize-spirv --split-input-file --spirv-save-validation-files-with-prefix=%t/module %s %}
// RUN: %if spirv-tools %{ spirv-val %t %}

spirv.module Logical GLSL450 requires #spirv.vce<v1.3, [Shader, Linkage, SubgroupBallotKHR, Groups, SubgroupBufferBlockIOINTEL, GroupNonUniformArithmetic, GroupUniformArithmeticKHR], [SPV_KHR_storage_buffer_storage_class, SPV_KHR_shader_ballot, SPV_INTEL_subgroups, SPV_KHR_uniform_group_instructions]> {
spirv.module Logical GLSL450 requires #spirv.vce<v1.3,
[Shader, Linkage, SubgroupBallotKHR, Groups, GroupNonUniformArithmetic, GroupUniformArithmeticKHR],
[SPV_KHR_storage_buffer_storage_class, SPV_KHR_shader_ballot, SPV_KHR_uniform_group_instructions]> {
// CHECK-LABEL: @subgroup_ballot
spirv.func @subgroup_ballot(%predicate: i1) -> vector<4xi32> "None" {
// CHECK: %{{.*}} = spirv.KHR.SubgroupBallot %{{.*}}: vector<4xi32>
Expand All @@ -24,30 +26,6 @@ spirv.module Logical GLSL450 requires #spirv.vce<v1.3, [Shader, Linkage, Subgrou
%0 = spirv.GroupBroadcast <Workgroup> %value, %localid : f32, vector<3xi32>
spirv.ReturnValue %0: f32
}
// CHECK-LABEL: @subgroup_block_read_intel
spirv.func @subgroup_block_read_intel(%ptr : !spirv.ptr<i32, StorageBuffer>) -> i32 "None" {
// CHECK: spirv.INTEL.SubgroupBlockRead %{{.*}} : !spirv.ptr<i32, StorageBuffer> -> i32
%0 = spirv.INTEL.SubgroupBlockRead %ptr : !spirv.ptr<i32, StorageBuffer> -> i32
spirv.ReturnValue %0: i32
}
// CHECK-LABEL: @subgroup_block_read_intel_vector
spirv.func @subgroup_block_read_intel_vector(%ptr : !spirv.ptr<i32, StorageBuffer>) -> vector<3xi32> "None" {
// CHECK: spirv.INTEL.SubgroupBlockRead %{{.*}} : !spirv.ptr<i32, StorageBuffer> -> vector<3xi32>
%0 = spirv.INTEL.SubgroupBlockRead %ptr : !spirv.ptr<i32, StorageBuffer> -> vector<3xi32>
spirv.ReturnValue %0: vector<3xi32>
}
// CHECK-LABEL: @subgroup_block_write_intel
spirv.func @subgroup_block_write_intel(%ptr : !spirv.ptr<i32, StorageBuffer>, %value: i32) -> () "None" {
// CHECK: spirv.INTEL.SubgroupBlockWrite %{{.*}}, %{{.*}} : i32
spirv.INTEL.SubgroupBlockWrite "StorageBuffer" %ptr, %value : i32
spirv.Return
}
// CHECK-LABEL: @subgroup_block_write_intel_vector
spirv.func @subgroup_block_write_intel_vector(%ptr : !spirv.ptr<i32, StorageBuffer>, %value: vector<3xi32>) -> () "None" {
// CHECK: spirv.INTEL.SubgroupBlockWrite %{{.*}}, %{{.*}} : vector<3xi32>
spirv.INTEL.SubgroupBlockWrite "StorageBuffer" %ptr, %value : vector<3xi32>
spirv.Return
}
// CHECK-LABEL: @group_iadd
spirv.func @group_iadd(%value: i32) -> i32 "None" {
// CHECK: spirv.GroupIAdd <Workgroup> <Reduce> %{{.*}} : i32
Expand Down
34 changes: 34 additions & 0 deletions mlir/test/Target/SPIRV/subgroup-block-intel.mlir
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Original file line number Diff line number Diff line change
@@ -0,0 +1,34 @@
// RUN: mlir-translate --no-implicit-module --test-spirv-roundtrip %s | FileCheck %s

// RUN: %if spirv-tools %{ rm -rf %t %}
// RUN: %if spirv-tools %{ mkdir %t %}
// RUN: %if spirv-tools %{ mlir-translate --no-implicit-module --serialize-spirv --spirv-save-validation-files-with-prefix=%t/module %s %}
// RUN: %if spirv-tools %{ spirv-val %t %}

spirv.module Physical64 GLSL450 requires #spirv.vce<v1.3, [Addresses, Shader, Linkage, SubgroupBufferBlockIOINTEL],
[SPV_KHR_storage_buffer_storage_class, SPV_INTEL_subgroups]> {
// CHECK-LABEL: @subgroup_block_read_intel
spirv.func @subgroup_block_read_intel(%ptr : !spirv.ptr<i32, StorageBuffer>) -> i32 "None" {
// CHECK: spirv.INTEL.SubgroupBlockRead %{{.*}} : !spirv.ptr<i32, StorageBuffer> -> i32
%0 = spirv.INTEL.SubgroupBlockRead %ptr : !spirv.ptr<i32, StorageBuffer> -> i32
spirv.ReturnValue %0: i32
}
// CHECK-LABEL: @subgroup_block_read_intel_vector
spirv.func @subgroup_block_read_intel_vector(%ptr : !spirv.ptr<i32, StorageBuffer>) -> vector<3xi32> "None" {
// CHECK: spirv.INTEL.SubgroupBlockRead %{{.*}} : !spirv.ptr<i32, StorageBuffer> -> vector<3xi32>
%0 = spirv.INTEL.SubgroupBlockRead %ptr : !spirv.ptr<i32, StorageBuffer> -> vector<3xi32>
spirv.ReturnValue %0: vector<3xi32>
}
// CHECK-LABEL: @subgroup_block_write_intel
spirv.func @subgroup_block_write_intel(%ptr : !spirv.ptr<i32, StorageBuffer>, %value: i32) -> () "None" {
// CHECK: spirv.INTEL.SubgroupBlockWrite %{{.*}}, %{{.*}} : i32
spirv.INTEL.SubgroupBlockWrite "StorageBuffer" %ptr, %value : i32
spirv.Return
}
// CHECK-LABEL: @subgroup_block_write_intel_vector
spirv.func @subgroup_block_write_intel_vector(%ptr : !spirv.ptr<i32, StorageBuffer>, %value: vector<3xi32>) -> () "None" {
// CHECK: spirv.INTEL.SubgroupBlockWrite %{{.*}}, %{{.*}} : vector<3xi32>
spirv.INTEL.SubgroupBlockWrite "StorageBuffer" %ptr, %value : vector<3xi32>
spirv.Return
}
}
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