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[WebAssembly] TableGen-erate SDNode descriptions #166259

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Merged
merged 2 commits into from
Nov 5, 2025
Merged

[WebAssembly] TableGen-erate SDNode descriptions #166259

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0391a67
[WebAssembly] TableGen-erate SDNode descriptions
s-barannikov Nov 15, 2024
a3dc8af
Merge branch 'main' into sdnode/webassembly
s-barannikov Nov 5, 2025
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1 change: 1 addition & 0 deletions llvm/lib/Target/WebAssembly/CMakeLists.txt
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Original file line number Diff line number Diff line change
Expand Up @@ -10,6 +10,7 @@ tablegen(LLVM WebAssemblyGenFastISel.inc -gen-fast-isel)
tablegen(LLVM WebAssemblyGenInstrInfo.inc -gen-instr-info)
tablegen(LLVM WebAssemblyGenMCCodeEmitter.inc -gen-emitter)
tablegen(LLVM WebAssemblyGenRegisterInfo.inc -gen-register-info)
tablegen(LLVM WebAssemblyGenSDNodeInfo.inc -gen-sd-node-info)
tablegen(LLVM WebAssemblyGenSubtargetInfo.inc -gen-subtarget)

add_public_tablegen_target(WebAssemblyCommonTableGen)
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64 changes: 0 additions & 64 deletions llvm/lib/Target/WebAssembly/WebAssemblyISD.def
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This file was deleted.

21 changes: 2 additions & 19 deletions llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
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Expand Up @@ -942,20 +942,6 @@ MachineBasicBlock *WebAssemblyTargetLowering::EmitInstrWithCustomInserter(
}
}

const char *
WebAssemblyTargetLowering::getTargetNodeName(unsigned Opcode) const {
switch (static_cast<WebAssemblyISD::NodeType>(Opcode)) {
case WebAssemblyISD::FIRST_NUMBER:
break;
#define HANDLE_NODETYPE(NODE) \
case WebAssemblyISD::NODE: \
return "WebAssemblyISD::" #NODE;
#include "WebAssemblyISD.def"
#undef HANDLE_NODETYPE
}
return nullptr;
}

std::pair<unsigned, const TargetRegisterClass *>
WebAssemblyTargetLowering::getRegForInlineAsmConstraint(
const TargetRegisterInfo *TRI, StringRef Constraint, MVT VT) const {
Expand Down Expand Up @@ -1830,11 +1816,8 @@ SDValue WebAssemblyTargetLowering::LowerLoad(SDValue Op,

SDValue Idx = DAG.getTargetConstant(*Local, Base, MVT::i32);
EVT LocalVT = LN->getValueType(0);
SDValue LocalGet = DAG.getNode(WebAssemblyISD::LOCAL_GET, DL, LocalVT,
{LN->getChain(), Idx});
SDValue Result = DAG.getMergeValues({LocalGet, LN->getChain()}, DL);
assert(Result->getNumValues() == 2 && "Loads must carry a chain!");
return Result;
return DAG.getNode(WebAssemblyISD::LOCAL_GET, DL, {LocalVT, MVT::Other},
{LN->getChain(), Idx});
}

if (WebAssembly::isWasmVarAddressSpace(LN->getAddressSpace()))
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12 changes: 0 additions & 12 deletions llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.h
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Expand Up @@ -19,17 +19,6 @@

namespace llvm {

namespace WebAssemblyISD {

enum NodeType : unsigned {
FIRST_NUMBER = ISD::BUILTIN_OP_END,
#define HANDLE_NODETYPE(NODE) NODE,
#include "WebAssemblyISD.def"
#undef HANDLE_NODETYPE
};

} // end namespace WebAssemblyISD

class WebAssemblySubtarget;

class WebAssemblyTargetLowering final : public TargetLowering {
Expand All @@ -53,7 +42,6 @@ class WebAssemblyTargetLowering final : public TargetLowering {
MachineBasicBlock *
EmitInstrWithCustomInserter(MachineInstr &MI,
MachineBasicBlock *MBB) const override;
const char *getTargetNodeName(unsigned Opcode) const override;
std::pair<unsigned, const TargetRegisterClass *>
getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
StringRef Constraint, MVT VT) const override;
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24 changes: 16 additions & 8 deletions llvm/lib/Target/WebAssembly/WebAssemblySelectionDAGInfo.cpp
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Expand Up @@ -11,23 +11,31 @@
///
//===----------------------------------------------------------------------===//

#include "WebAssemblySelectionDAGInfo.h"
#include "WebAssemblyTargetMachine.h"

#define GET_SDNODE_DESC
#include "WebAssemblyGenSDNodeInfo.inc"

using namespace llvm;

#define DEBUG_TYPE "wasm-selectiondag-info"

WebAssemblySelectionDAGInfo::WebAssemblySelectionDAGInfo()
: SelectionDAGGenTargetInfo(WebAssemblyGenSDNodeInfo) {}

WebAssemblySelectionDAGInfo::~WebAssemblySelectionDAGInfo() = default; // anchor

bool WebAssemblySelectionDAGInfo::isTargetMemoryOpcode(unsigned Opcode) const {
const char *
WebAssemblySelectionDAGInfo::getTargetNodeName(unsigned Opcode) const {
switch (static_cast<WebAssemblyISD::NodeType>(Opcode)) {
default:
return false;
case WebAssemblyISD::GLOBAL_GET:
case WebAssemblyISD::GLOBAL_SET:
case WebAssemblyISD::TABLE_GET:
case WebAssemblyISD::TABLE_SET:
return true;
case WebAssemblyISD::CALL:
return "WebAssemblyISD::CALL";
case WebAssemblyISD::RET_CALL:
return "WebAssemblyISD::RET_CALL";
}

return SelectionDAGGenTargetInfo::getTargetNodeName(Opcode);
}

SDValue WebAssemblySelectionDAGInfo::EmitTargetCodeForMemcpy(
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17 changes: 15 additions & 2 deletions llvm/lib/Target/WebAssembly/WebAssemblySelectionDAGInfo.h
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Expand Up @@ -17,13 +17,26 @@

#include "llvm/CodeGen/SelectionDAGTargetInfo.h"

#define GET_SDNODE_ENUM
#include "WebAssemblyGenSDNodeInfo.inc"

namespace llvm {
namespace WebAssemblyISD {

enum NodeType : unsigned {
CALL = GENERATED_OPCODE_END,
RET_CALL,
};

class WebAssemblySelectionDAGInfo final : public SelectionDAGTargetInfo {
} // namespace WebAssemblyISD

class WebAssemblySelectionDAGInfo final : public SelectionDAGGenTargetInfo {
public:
WebAssemblySelectionDAGInfo();

~WebAssemblySelectionDAGInfo() override;

bool isTargetMemoryOpcode(unsigned Opcode) const override;
const char *getTargetNodeName(unsigned Opcode) const override;

SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, const SDLoc &dl,
SDValue Chain, SDValue Op1, SDValue Op2,
Expand Down