[AMDGPU][MC] Disallow nogds in ds_gws_* instructions #166438
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The ds_gws_* instrucitons require gds as an operand. However, when nogds is given, it is treated the same as gds. This patch fixes this to disallow nogds.
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@llvm/pr-subscribers-backend-amdgpu Author: Jun Wang (jwanggit86) ChangesThe ds_gws_* instrucitons require gds as an operand. However, when nogds is given, it is treated the same as gds. This patch fixes this to disallow nogds. Full diff: https://github.com/llvm/llvm-project/pull/166438.diff 6 Files Affected:
diff --git a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
index 09338c533fdf2..7d952eb3f5100 100644
--- a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
+++ b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
@@ -5330,6 +5330,15 @@ bool AMDGPUAsmParser::validateDS(const MCInst &Inst,
// DS_GWS opcodes must use even aligned registers.
bool AMDGPUAsmParser::validateGWS(const MCInst &Inst,
const OperandVector &Operands) {
+ // Disallow "nogds".
+ // In ds_gws_* instructions, gds is always the last operand.
+ auto GDSOprnd = static_cast<AMDGPUOperand &>(*Operands.back());
+ assert(GDSOprnd.isGDS());
+ if (GDSOprnd.getImm() == 0) {
+ Error(GDSOprnd.getStartLoc(), "nogds is not allowed");
+ return false;
+ }
+
if (!getFeatureBits()[AMDGPU::FeatureGFX90AInsts])
return true;
diff --git a/llvm/test/MC/AMDGPU/gfx10_asm_ds_err.s b/llvm/test/MC/AMDGPU/gfx10_asm_ds_err.s
new file mode 100644
index 0000000000000..dcf3f1be4139f
--- /dev/null
+++ b/llvm/test/MC/AMDGPU/gfx10_asm_ds_err.s
@@ -0,0 +1,38 @@
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32 %s 2>&1 | FileCheck --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize64 %s 2>&1 | FileCheck --implicit-check-not=error: %s
+
+ds_gws_sema_release_all nogds
+// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: nogds is not allowed
+
+ds_gws_sema_release_all offset:4660 nogds
+// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: nogds is not allowed
+
+ds_gws_init v0 nogds
+// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: nogds is not allowed
+
+ds_gws_init v0 offset:0 nogds
+// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: nogds is not allowed
+
+ds_gws_sema_v nogds
+// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: nogds is not allowed
+
+ds_gws_sema_v offset:65535 nogds
+// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: nogds is not allowed
+
+ds_gws_sema_br v0 nogds
+// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: nogds is not allowed
+
+ds_gws_sema_br v0 offset:4660 nogds
+// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: nogds is not allowed
+
+ds_gws_sema_p nogds
+// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: nogds is not allowed
+
+ds_gws_sema_p offset:0 nogds
+// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: nogds is not allowed
+
+ds_gws_barrier v0 nogds
+// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: nogds is not allowed
+
+ds_gws_barrier v0 offset:0 nogds
+// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: nogds is not allowed
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_ds_err.s b/llvm/test/MC/AMDGPU/gfx11_asm_ds_err.s
new file mode 100644
index 0000000000000..c7c92fe51238a
--- /dev/null
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_ds_err.s
@@ -0,0 +1,37 @@
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 %s 2>&1 | FileCheck --implicit-check-not=error: %s
+
+ds_gws_barrier v1 nogds
+// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: nogds is not allowed
+
+ds_gws_barrier v1 offset:65535 nogds
+// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: nogds is not allowed
+
+ds_gws_init v1 nogds
+// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: nogds is not allowed
+
+ds_gws_init v1 offset:65535 nogds
+// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: nogds is not allowed
+
+ds_gws_sema_br v1 nogds
+// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: nogds is not allowed
+
+ds_gws_sema_br v1 offset:65535 nogds
+// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: nogds is not allowed
+
+ds_gws_sema_p nogds
+// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: nogds is not allowed
+
+ds_gws_sema_p offset:65535 nogds
+// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: nogds is not allowed
+
+ds_gws_sema_release_all nogds
+// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: nogds is not allowed
+
+ds_gws_sema_release_all offset:65535 nogds
+// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: nogds is not allowed
+
+ds_gws_sema_v nogds
+// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: nogds is not allowed
+
+ds_gws_sema_v offset:65535 nogds
+// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: nogds is not allowed
diff --git a/llvm/test/MC/AMDGPU/gfx7_asm_ds_err.s b/llvm/test/MC/AMDGPU/gfx7_asm_ds_err.s
new file mode 100644
index 0000000000000..5596bf5b6ea30
--- /dev/null
+++ b/llvm/test/MC/AMDGPU/gfx7_asm_ds_err.s
@@ -0,0 +1,37 @@
+// RUN: not llvm-mc -triple=amdgcn -mcpu=bonaire %s 2>&1 | FileCheck --implicit-check-not=error: %s
+
+ds_gws_sema_release_all offset:65535 nogds
+// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: nogds is not allowed
+
+ds_gws_sema_release_all nogds
+// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: nogds is not allowed
+
+ds_gws_init v1 offset:65535 nogds
+// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: nogds is not allowed
+
+ds_gws_init v1 nogds
+// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: nogds is not allowed
+
+ds_gws_sema_v offset:65535 nogds
+// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: nogds is not allowed
+
+ds_gws_sema_v nogds
+// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: nogds is not allowed
+
+ds_gws_sema_br v1 offset:65535 nogds
+// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: nogds is not allowed
+
+ds_gws_sema_br v1 nogds
+// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: nogds is not allowed
+
+ds_gws_sema_p offset:65535 nogds
+// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: nogds is not allowed
+
+ds_gws_sema_p nogds
+// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: nogds is not allowed
+
+ds_gws_barrier v255 offset:65535 nogds
+// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: nogds is not allowed
+
+ds_gws_barrier v1 nogds
+// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: nogds is not allowed
diff --git a/llvm/test/MC/AMDGPU/gfx8_asm_ds_err.s b/llvm/test/MC/AMDGPU/gfx8_asm_ds_err.s
new file mode 100644
index 0000000000000..27df0b8eacf43
--- /dev/null
+++ b/llvm/test/MC/AMDGPU/gfx8_asm_ds_err.s
@@ -0,0 +1,37 @@
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tonga %s 2>&1 | FileCheck --implicit-check-not=error: %s
+
+ds_gws_sema_release_all offset:65535 nogds
+// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: nogds is not allowed
+
+ds_gws_sema_release_all nogds
+// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: nogds is not allowed
+
+ds_gws_init v1 offset:65535 nogds
+// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: nogds is not allowed
+
+ds_gws_init v1 nogds
+// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: nogds is not allowed
+
+ds_gws_sema_v offset:65535 nogds
+// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: nogds is not allowed
+
+ds_gws_sema_v nogds
+// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: nogds is not allowed
+
+ds_gws_sema_br v1 offset:65535 nogds
+// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: nogds is not allowed
+
+ds_gws_sema_br v1 nogds
+// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: nogds is not allowed
+
+ds_gws_sema_p offset:65535 nogds
+// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: nogds is not allowed
+
+ds_gws_sema_p nogds
+// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: nogds is not allowed
+
+ds_gws_barrier v255 offset:65535 nogds
+// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: nogds is not allowed
+
+ds_gws_barrier v1 nogds
+// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: nogds is not allowed
diff --git a/llvm/test/MC/AMDGPU/gfx9_asm_ds_err.s b/llvm/test/MC/AMDGPU/gfx9_asm_ds_err.s
new file mode 100644
index 0000000000000..e9c71cc3d000c
--- /dev/null
+++ b/llvm/test/MC/AMDGPU/gfx9_asm_ds_err.s
@@ -0,0 +1,37 @@
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck --implicit-check-not=error: %s
+
+ds_gws_sema_release_all offset:65535 nogds
+// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: nogds is not allowed
+
+ds_gws_sema_release_all nogds
+// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: nogds is not allowed
+
+ds_gws_init v1 offset:65535 nogds
+// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: nogds is not allowed
+
+ds_gws_init v1 nogds
+// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: nogds is not allowed
+
+ds_gws_sema_v offset:65535 nogds
+// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: nogds is not allowed
+
+ds_gws_sema_v nogds
+// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: nogds is not allowed
+
+ds_gws_sema_br v1 offset:65535 nogds
+// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: nogds is not allowed
+
+ds_gws_sema_br v1 nogds
+// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: nogds is not allowed
+
+ds_gws_sema_p offset:65535 nogds
+// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: nogds is not allowed
+
+ds_gws_sema_p nogds
+// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: nogds is not allowed
+
+ds_gws_barrier v1 offset:65535 nogds
+// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: nogds is not allowed
+
+ds_gws_barrier v1 nogds
+// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: nogds is not allowed
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arsenm
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Nov 4, 2025
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I don't understand this. Has "nogds" ever been a modifier? I do not see that in any tests
| @@ -0,0 +1,38 @@ | |||
| // RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32 %s 2>&1 | FileCheck --implicit-check-not=error: %s | |||
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| // RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32 %s 2>&1 | FileCheck --implicit-check-not=error: %s | |
| // RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 %s 2>&1 | FileCheck --implicit-check-not=error: %s |
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Some instructions all "nogds", e.g., ds_add_u32. When "nogds" is given, the gds bit is cleared. However, the printer does not print "nogds".
arsenm
reviewed
Nov 4, 2025
| // DS_GWS opcodes must use even aligned registers. | ||
| bool AMDGPUAsmParser::validateGWS(const MCInst &Inst, | ||
| const OperandVector &Operands) { | ||
| // Disallow "nogds". |
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How did the "no" parse in the first place?
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AMDGPUAsmParser::parseCustomOperand() calls parseNamedBit() to parse operands such as "gds". Both "gds" and "nogds" are parsed in the latter, and both ends up as an AMDGPUAsmParser::Immediate. The only difference is "gds" has the value 1 while "nogds" 0.
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The ds_gws_* instructions require gds as an operand. However, when nogds is given, it is treated the same as gds. This patch fixes this to disallow nogds.