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AMDGPU: Cleanup and modernize limit-coalesce.mir test #166465

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Nov 4, 2025
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AMDGPU: Cleanup and modernize limit-coalesce.mir test #166465

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63 changes: 18 additions & 45 deletions llvm/test/CodeGen/AMDGPU/limit-coalesce.mir
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Original file line number Diff line number Diff line change
Expand Up @@ -6,40 +6,12 @@
# No more registers shall be defined
---
name: main
alignment: 1
exposesReturnsTwice: false
legalized: false
regBankSelected: false
selected: false
tracksRegLiveness: true
registers:
- { id: 1, class: sreg_32_xm0, preferred-register: '%1' }
- { id: 2, class: vreg_64, preferred-register: '%2' }
- { id: 3, class: vreg_64 }
- { id: 4, class: vreg_64 }
- { id: 5, class: vreg_64 }
- { id: 6, class: vreg_96 }
- { id: 7, class: vreg_96 }
- { id: 8, class: vreg_128 }
- { id: 9, class: vreg_128 }
liveins:
- { reg: '$sgpr6', virtual-reg: '%1' }
frameInfo:
isFrameAddressTaken: false
isReturnAddressTaken: false
hasStackMap: false
hasPatchPoint: false
stackSize: 0
offsetAdjustment: 0
maxAlignment: 0
adjustsStack: false
hasCalls: false
maxCallFrameSize: 0
hasOpaqueSPAdjustment: false
hasVAStart: false
hasMustTailInVarArgFunc: false
- { id: 0, class: sreg_32_xm0, preferred-register: '%0' }
- { id: 1, class: vreg_64, preferred-register: '%1' }
body: |
bb.0.entry:
bb.0:
liveins: $sgpr0, $vgpr0_vgpr1

; CHECK-LABEL: name: main
Expand All @@ -59,20 +31,21 @@ body: |
; CHECK-NEXT: undef [[COPY3:%[0-9]+]].sub0_sub1_sub2:vreg_128 = COPY [[DEF2]]
; CHECK-NEXT: [[COPY3:%[0-9]+]].sub3:vreg_128 = COPY [[DEF]].sub0
; CHECK-NEXT: FLAT_STORE_DWORDX4 $vgpr0_vgpr1, [[COPY3]], 0, 0, implicit $exec, implicit $flat_scr
%3 = IMPLICIT_DEF
undef %4.sub0 = COPY $sgpr0
%4.sub1 = COPY %3.sub0
undef %5.sub0 = COPY %4.sub1
%5.sub1 = COPY %4.sub0
FLAT_STORE_DWORDX2 $vgpr0_vgpr1, killed %5, 0, 0, implicit $exec, implicit $flat_scr
%2:vreg_64 = IMPLICIT_DEF
undef %3.sub0:vreg_64 = COPY $sgpr0
%3.sub1:vreg_64 = COPY %2.sub0
undef %4.sub0:vreg_64 = COPY %3.sub1
%4.sub1:vreg_64 = COPY %3.sub0
FLAT_STORE_DWORDX2 $vgpr0_vgpr1, killed %4, 0, 0, implicit $exec, implicit $flat_scr

%6 = IMPLICIT_DEF
undef %7.sub0_sub1 = COPY %6
%7.sub2 = COPY %3.sub0
FLAT_STORE_DWORDX3 $vgpr0_vgpr1, killed %7, 0, 0, implicit $exec, implicit $flat_scr
%5:vreg_96 = IMPLICIT_DEF
undef %6.sub0_sub1:vreg_96 = COPY %5
%6.sub2:vreg_96 = COPY %2.sub0
FLAT_STORE_DWORDX3 $vgpr0_vgpr1, killed %6, 0, 0, implicit $exec, implicit $flat_scr

%7:vreg_128 = IMPLICIT_DEF
undef %8.sub0_sub1_sub2:vreg_128 = COPY %7
%8.sub3:vreg_128 = COPY %2.sub0
FLAT_STORE_DWORDX4 $vgpr0_vgpr1, killed %8, 0, 0, implicit $exec, implicit $flat_scr

%8 = IMPLICIT_DEF
undef %9.sub0_sub1_sub2 = COPY %8
%9.sub3 = COPY %3.sub0
FLAT_STORE_DWORDX4 $vgpr0_vgpr1, killed %9, 0, 0, implicit $exec, implicit $flat_scr
...
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