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32 changes: 32 additions & 0 deletions llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -31527,6 +31527,38 @@ bool AArch64TargetLowering::SimplifyDemandedBitsForTargetNode(
Op, OriginalDemandedBits, OriginalDemandedElts, Known, TLO, Depth);
}

bool AArch64TargetLowering::SimplifyDemandedVectorEltsForTargetNode(
SDValue Op,
const APInt &DemandedElts,
Comment on lines +31530 to +31532
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This needs formatting (with clang-format) and some tests

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Am I bit overwhelmed right now with some work. Will see to it in about a week.

APInt &KnownUndef,
APInt &KnownZero,
TargetLoweringOpt &TLO,
unsigned Depth) const {

SDNode *N = Op.getNode();
unsigned Opc = N->getOpcode();

if (Opc != AArch64ISD::DUPLANE8 &&
Opc != AArch64ISD::DUPLANE16 &&
Opc != AArch64ISD::DUPLANE32 &&
Opc != AArch64ISD::DUPLANE64)
return false;

if (DemandedElts.popcount() != 1)
return false;

SDValue Src = N->getOperand(0);
SDValue Lane = N->getOperand(1);

SDLoc DL(N);
SelectionDAG &DAG = TLO.DAG;

SDValue Extracted = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, Src.getValueType().getScalarType(), Src, Lane);
SDValue Splat = DAG.getSplatVector(Op.getValueType(), DL, Extracted);

return TLO.CombineTo(Op, Splat);
}

bool AArch64TargetLowering::canCreateUndefOrPoisonForTargetNode(
SDValue Op, const APInt &DemandedElts, const SelectionDAG &DAG,
bool PoisonOnly, bool ConsiderFlags, unsigned Depth) const {
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7 changes: 7 additions & 0 deletions llvm/lib/Target/AArch64/AArch64ISelLowering.h
Original file line number Diff line number Diff line change
Expand Up @@ -880,6 +880,13 @@ class AArch64TargetLowering : public TargetLowering {
TargetLoweringOpt &TLO,
unsigned Depth) const override;

bool SimplifyDemandedVectorEltsForTargetNode(SDValue Op,
const APInt &DemandedElts,
APInt &KnownUndef,
APInt &KnownZero,
TargetLoweringOpt &TLO,
unsigned Depth) const override;

bool canCreateUndefOrPoisonForTargetNode(SDValue Op,
const APInt &DemandedElts,
const SelectionDAG &DAG,
Expand Down
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