Skip to content

[AMDGPU] Propagate debug locations to compiler-generated instructions #168573

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Open
wants to merge 1 commit into
base: main
Choose a base branch
from
+17 −11
Open

[AMDGPU] Propagate debug locations to compiler-generated instructions #168573

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
1 commit
Select commit
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
4 changes: 2 additions & 2 deletions llvm/include/llvm/CodeGen/SelectionDAGNodes.h
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -1754,8 +1754,8 @@ class ConstantSDNode : public SDNode {
const ConstantInt *Value;

ConstantSDNode(bool isTarget, bool isOpaque, const ConstantInt *val,
SDVTList VTs)
: SDNode(isTarget ? ISD::TargetConstant : ISD::Constant, 0, DebugLoc(),
SDVTList VTs, const DebugLoc &DL)
: SDNode(isTarget ? ISD::TargetConstant : ISD::Constant, 0, DL,
Comment on lines +1757 to +1758
Copy link
Contributor

@arsenm arsenm Nov 18, 2025

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Doesn't belong in this patch

VTs),
Value(val) {
assert(!isa<VectorType>(val->getType()) && "Unexpected vector type!");
Expand Down
2 changes: 1 addition & 1 deletion llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -1773,7 +1773,7 @@ SDValue SelectionDAG::getConstant(const ConstantInt &Val, const SDLoc &DL,
return SDValue(N, 0);

if (!N) {
N = newSDNode<ConstantSDNode>(isT, isO, Elt, VTs);
N = newSDNode<ConstantSDNode>(isT, isO, Elt, VTs, DL.getDebugLoc());
CSEMap.InsertNode(N, IP);
InsertNode(N);
NewSDValueDbgMsg(SDValue(N, 0), "Creating constant: ", this);
Expand Down
22 changes: 14 additions & 8 deletions llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -1179,16 +1179,17 @@ void SIWholeQuadMode::toExact(MachineBasicBlock &MBB,
}
}

const DebugLoc &DL = MBB.findDebugLoc(Before);
MachineInstr *MI;

if (SaveWQM) {
unsigned Opcode =
IsTerminator ? LMC.AndSaveExecTermOpc : LMC.AndSaveExecOpc;
MI = BuildMI(MBB, Before, DebugLoc(), TII->get(Opcode), SaveWQM)
MI = BuildMI(MBB, Before, DL, TII->get(Opcode), SaveWQM)
.addReg(LiveMaskReg);
} else {
unsigned Opcode = IsTerminator ? LMC.AndTermOpc : LMC.AndOpc;
MI = BuildMI(MBB, Before, DebugLoc(), TII->get(Opcode), LMC.ExecReg)
MI = BuildMI(MBB, Before, DL, TII->get(Opcode), LMC.ExecReg)
.addReg(LMC.ExecReg)
.addReg(LiveMaskReg);
}
Expand All @@ -1200,13 +1201,14 @@ void SIWholeQuadMode::toExact(MachineBasicBlock &MBB,
void SIWholeQuadMode::toWQM(MachineBasicBlock &MBB,
MachineBasicBlock::iterator Before,
Register SavedWQM) {
const DebugLoc &DL = MBB.findDebugLoc(Before);
MachineInstr *MI;

if (SavedWQM) {
MI = BuildMI(MBB, Before, DebugLoc(), TII->get(AMDGPU::COPY), LMC.ExecReg)
MI = BuildMI(MBB, Before, DL, TII->get(AMDGPU::COPY), LMC.ExecReg)
.addReg(SavedWQM);
} else {
MI = BuildMI(MBB, Before, DebugLoc(), TII->get(LMC.WQMOpc), LMC.ExecReg)
MI = BuildMI(MBB, Before, DL, TII->get(LMC.WQMOpc), LMC.ExecReg)
.addReg(LMC.ExecReg);
}

Expand All @@ -1222,12 +1224,14 @@ void SIWholeQuadMode::toStrictMode(MachineBasicBlock &MBB,
assert(StrictStateNeeded == StateStrictWWM ||
StrictStateNeeded == StateStrictWQM);

const DebugLoc &DL = MBB.findDebugLoc(Before);

if (StrictStateNeeded == StateStrictWWM) {
MI = BuildMI(MBB, Before, DebugLoc(), TII->get(AMDGPU::ENTER_STRICT_WWM),
MI = BuildMI(MBB, Before, DL, TII->get(AMDGPU::ENTER_STRICT_WWM),
SaveOrig)
.addImm(-1);
} else {
MI = BuildMI(MBB, Before, DebugLoc(), TII->get(AMDGPU::ENTER_STRICT_WQM),
MI = BuildMI(MBB, Before, DL, TII->get(AMDGPU::ENTER_STRICT_WQM),
SaveOrig)
.addImm(-1);
}
Expand All @@ -1245,12 +1249,14 @@ void SIWholeQuadMode::fromStrictMode(MachineBasicBlock &MBB,
assert(CurrentStrictState == StateStrictWWM ||
CurrentStrictState == StateStrictWQM);

const DebugLoc &DL = MBB.findDebugLoc(Before);

if (CurrentStrictState == StateStrictWWM) {
MI = BuildMI(MBB, Before, DebugLoc(), TII->get(AMDGPU::EXIT_STRICT_WWM),
MI = BuildMI(MBB, Before, DL, TII->get(AMDGPU::EXIT_STRICT_WWM),
LMC.ExecReg)
.addReg(SavedOrig);
} else {
MI = BuildMI(MBB, Before, DebugLoc(), TII->get(AMDGPU::EXIT_STRICT_WQM),
MI = BuildMI(MBB, Before, DL, TII->get(AMDGPU::EXIT_STRICT_WQM),
LMC.ExecReg)
.addReg(SavedOrig);
}
Expand Down
Loading