[AMDGPU] Propagate debug locations to compiler-generated instructions #168573
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Compiler-generated instructions were missing debug locations, causing "Line 0" entries in DWARF
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@llvm/pr-subscribers-llvm-selectiondag @llvm/pr-subscribers-backend-amdgpu Author: Aleksandar Spasojevic (aleksandar-amd) ChangesConstant materialization instructions are assigned accurate debug locations. Full diff: https://github.com/llvm/llvm-project/pull/168573.diff 3 Files Affected:
diff --git a/llvm/include/llvm/CodeGen/SelectionDAGNodes.h b/llvm/include/llvm/CodeGen/SelectionDAGNodes.h
index cfc8a4243e894..05833f97bc035 100644
--- a/llvm/include/llvm/CodeGen/SelectionDAGNodes.h
+++ b/llvm/include/llvm/CodeGen/SelectionDAGNodes.h
@@ -1754,8 +1754,8 @@ class ConstantSDNode : public SDNode {
const ConstantInt *Value;
ConstantSDNode(bool isTarget, bool isOpaque, const ConstantInt *val,
- SDVTList VTs)
- : SDNode(isTarget ? ISD::TargetConstant : ISD::Constant, 0, DebugLoc(),
+ SDVTList VTs, const DebugLoc &DL)
+ : SDNode(isTarget ? ISD::TargetConstant : ISD::Constant, 0, DL,
VTs),
Value(val) {
assert(!isa<VectorType>(val->getType()) && "Unexpected vector type!");
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 16fdef06d6679..5502bddbc3ba7 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -1773,7 +1773,7 @@ SDValue SelectionDAG::getConstant(const ConstantInt &Val, const SDLoc &DL,
return SDValue(N, 0);
if (!N) {
- N = newSDNode<ConstantSDNode>(isT, isO, Elt, VTs);
+ N = newSDNode<ConstantSDNode>(isT, isO, Elt, VTs, DL.getDebugLoc());
CSEMap.InsertNode(N, IP);
InsertNode(N);
NewSDValueDbgMsg(SDValue(N, 0), "Creating constant: ", this);
diff --git a/llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp b/llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
index 10762edc16264..355b97cdb9ee8 100644
--- a/llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
+++ b/llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
@@ -1179,16 +1179,17 @@ void SIWholeQuadMode::toExact(MachineBasicBlock &MBB,
}
}
+ const DebugLoc &DL = MBB.findDebugLoc(Before);
MachineInstr *MI;
if (SaveWQM) {
unsigned Opcode =
IsTerminator ? LMC.AndSaveExecTermOpc : LMC.AndSaveExecOpc;
- MI = BuildMI(MBB, Before, DebugLoc(), TII->get(Opcode), SaveWQM)
+ MI = BuildMI(MBB, Before, DL, TII->get(Opcode), SaveWQM)
.addReg(LiveMaskReg);
} else {
unsigned Opcode = IsTerminator ? LMC.AndTermOpc : LMC.AndOpc;
- MI = BuildMI(MBB, Before, DebugLoc(), TII->get(Opcode), LMC.ExecReg)
+ MI = BuildMI(MBB, Before, DL, TII->get(Opcode), LMC.ExecReg)
.addReg(LMC.ExecReg)
.addReg(LiveMaskReg);
}
@@ -1200,13 +1201,14 @@ void SIWholeQuadMode::toExact(MachineBasicBlock &MBB,
void SIWholeQuadMode::toWQM(MachineBasicBlock &MBB,
MachineBasicBlock::iterator Before,
Register SavedWQM) {
+ const DebugLoc &DL = MBB.findDebugLoc(Before);
MachineInstr *MI;
if (SavedWQM) {
- MI = BuildMI(MBB, Before, DebugLoc(), TII->get(AMDGPU::COPY), LMC.ExecReg)
+ MI = BuildMI(MBB, Before, DL, TII->get(AMDGPU::COPY), LMC.ExecReg)
.addReg(SavedWQM);
} else {
- MI = BuildMI(MBB, Before, DebugLoc(), TII->get(LMC.WQMOpc), LMC.ExecReg)
+ MI = BuildMI(MBB, Before, DL, TII->get(LMC.WQMOpc), LMC.ExecReg)
.addReg(LMC.ExecReg);
}
@@ -1222,12 +1224,14 @@ void SIWholeQuadMode::toStrictMode(MachineBasicBlock &MBB,
assert(StrictStateNeeded == StateStrictWWM ||
StrictStateNeeded == StateStrictWQM);
+ const DebugLoc &DL = MBB.findDebugLoc(Before);
+
if (StrictStateNeeded == StateStrictWWM) {
- MI = BuildMI(MBB, Before, DebugLoc(), TII->get(AMDGPU::ENTER_STRICT_WWM),
+ MI = BuildMI(MBB, Before, DL, TII->get(AMDGPU::ENTER_STRICT_WWM),
SaveOrig)
.addImm(-1);
} else {
- MI = BuildMI(MBB, Before, DebugLoc(), TII->get(AMDGPU::ENTER_STRICT_WQM),
+ MI = BuildMI(MBB, Before, DL, TII->get(AMDGPU::ENTER_STRICT_WQM),
SaveOrig)
.addImm(-1);
}
@@ -1245,12 +1249,14 @@ void SIWholeQuadMode::fromStrictMode(MachineBasicBlock &MBB,
assert(CurrentStrictState == StateStrictWWM ||
CurrentStrictState == StateStrictWQM);
+ const DebugLoc &DL = MBB.findDebugLoc(Before);
+
if (CurrentStrictState == StateStrictWWM) {
- MI = BuildMI(MBB, Before, DebugLoc(), TII->get(AMDGPU::EXIT_STRICT_WWM),
+ MI = BuildMI(MBB, Before, DL, TII->get(AMDGPU::EXIT_STRICT_WWM),
LMC.ExecReg)
.addReg(SavedOrig);
} else {
- MI = BuildMI(MBB, Before, DebugLoc(), TII->get(AMDGPU::EXIT_STRICT_WQM),
+ MI = BuildMI(MBB, Before, DL, TII->get(AMDGPU::EXIT_STRICT_WQM),
LMC.ExecReg)
.addReg(SavedOrig);
}
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You can test this locally with the following command:git-clang-format --diff origin/main HEAD --extensions cpp,h -- llvm/include/llvm/CodeGen/SelectionDAGNodes.h llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp --diff_from_common_commit
View the diff from clang-format here.diff --git a/llvm/include/llvm/CodeGen/SelectionDAGNodes.h b/llvm/include/llvm/CodeGen/SelectionDAGNodes.h
index 05833f97b..a791563be 100644
--- a/llvm/include/llvm/CodeGen/SelectionDAGNodes.h
+++ b/llvm/include/llvm/CodeGen/SelectionDAGNodes.h
@@ -1755,8 +1755,7 @@ class ConstantSDNode : public SDNode {
ConstantSDNode(bool isTarget, bool isOpaque, const ConstantInt *val,
SDVTList VTs, const DebugLoc &DL)
- : SDNode(isTarget ? ISD::TargetConstant : ISD::Constant, 0, DL,
- VTs),
+ : SDNode(isTarget ? ISD::TargetConstant : ISD::Constant, 0, DL, VTs),
Value(val) {
assert(!isa<VectorType>(val->getType()) && "Unexpected vector type!");
ConstantSDNodeBits.IsOpaque = isOpaque;
diff --git a/llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp b/llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
index 355b97cdb..9a05f1880 100644
--- a/llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
+++ b/llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
@@ -1185,8 +1185,8 @@ void SIWholeQuadMode::toExact(MachineBasicBlock &MBB,
if (SaveWQM) {
unsigned Opcode =
IsTerminator ? LMC.AndSaveExecTermOpc : LMC.AndSaveExecOpc;
- MI = BuildMI(MBB, Before, DL, TII->get(Opcode), SaveWQM)
- .addReg(LiveMaskReg);
+ MI =
+ BuildMI(MBB, Before, DL, TII->get(Opcode), SaveWQM).addReg(LiveMaskReg);
} else {
unsigned Opcode = IsTerminator ? LMC.AndTermOpc : LMC.AndOpc;
MI = BuildMI(MBB, Before, DL, TII->get(Opcode), LMC.ExecReg)
@@ -1227,12 +1227,10 @@ void SIWholeQuadMode::toStrictMode(MachineBasicBlock &MBB,
const DebugLoc &DL = MBB.findDebugLoc(Before);
if (StrictStateNeeded == StateStrictWWM) {
- MI = BuildMI(MBB, Before, DL, TII->get(AMDGPU::ENTER_STRICT_WWM),
- SaveOrig)
+ MI = BuildMI(MBB, Before, DL, TII->get(AMDGPU::ENTER_STRICT_WWM), SaveOrig)
.addImm(-1);
} else {
- MI = BuildMI(MBB, Before, DL, TII->get(AMDGPU::ENTER_STRICT_WQM),
- SaveOrig)
+ MI = BuildMI(MBB, Before, DL, TII->get(AMDGPU::ENTER_STRICT_WQM), SaveOrig)
.addImm(-1);
}
LIS->InsertMachineInstrInMaps(*MI);
@@ -1252,13 +1250,13 @@ void SIWholeQuadMode::fromStrictMode(MachineBasicBlock &MBB,
const DebugLoc &DL = MBB.findDebugLoc(Before);
if (CurrentStrictState == StateStrictWWM) {
- MI = BuildMI(MBB, Before, DL, TII->get(AMDGPU::EXIT_STRICT_WWM),
- LMC.ExecReg)
- .addReg(SavedOrig);
+ MI =
+ BuildMI(MBB, Before, DL, TII->get(AMDGPU::EXIT_STRICT_WWM), LMC.ExecReg)
+ .addReg(SavedOrig);
} else {
- MI = BuildMI(MBB, Before, DL, TII->get(AMDGPU::EXIT_STRICT_WQM),
- LMC.ExecReg)
- .addReg(SavedOrig);
+ MI =
+ BuildMI(MBB, Before, DL, TII->get(AMDGPU::EXIT_STRICT_WQM), LMC.ExecReg)
+ .addReg(SavedOrig);
}
LIS->InsertMachineInstrInMaps(*MI);
StateTransition[MI] = NonStrictState;
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Contributor
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test? |
🐧 Linux x64 Test Results
Failed Tests(click on a test name to see its output) LLVMLLVM.CodeGen/AMDGPU/ptr-arg-dbg-value.llLLVM.CodeGen/BPF/CORE/offset-reloc-basic.llLLVM.DebugInfo/AMDGPU/debug-loc-copy.llLLVM.DebugInfo/ARM/single-constant-use-preserves-dbgloc.llLLVM.DebugInfo/COFF/jump-table-with-indirect-ptr-null.llLLVM.tools/llvm-objdump/ELF/AMDGPU/source-lines.llIf these failures are unrelated to your changes (for example tests are broken or flaky at HEAD), please open an issue at https://github.com/llvm/llvm-project/issues and add the |
arsenm
reviewed
Nov 18, 2025
Comment on lines
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| SDVTList VTs, const DebugLoc &DL) | ||
| : SDNode(isTarget ? ISD::TargetConstant : ISD::Constant, 0, DL, |
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Constant materialization instructions are assigned accurate debug locations.
Debug metadata propagation in SIWholeQuadMode pass.