[TableGen] Constify CodeGenInstruction where possible (NFC) #169193
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@llvm/pr-subscribers-llvm-globalisel @llvm/pr-subscribers-tablegen Author: Sergei Barannikov (s-barannikov) ChangesFull diff: https://github.com/llvm/llvm-project/pull/169193.diff 8 Files Affected:
diff --git a/llvm/utils/TableGen/CodeEmitterGen.cpp b/llvm/utils/TableGen/CodeEmitterGen.cpp
index f2fd889746bac..278fcd74cecdb 100644
--- a/llvm/utils/TableGen/CodeEmitterGen.cpp
+++ b/llvm/utils/TableGen/CodeEmitterGen.cpp
@@ -103,7 +103,7 @@ bool CodeEmitterGen::addCodeToMergeInOperand(const Record *R,
const std::string &VarName,
std::string &Case,
std::string &BitOffsetCase) {
- CodeGenInstruction &CGI = Target.getInstruction(R);
+ const CodeGenInstruction &CGI = Target.getInstruction(R);
// Determine if VarName actually contributes to the Inst encoding.
int Bit = BI->getNumBits() - 1;
diff --git a/llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp b/llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp
index 34355d5d6b743..dae613f3017e5 100644
--- a/llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp
+++ b/llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp
@@ -1990,7 +1990,8 @@ static unsigned GetNumNodeResults(const Record *Operator,
}
if (Operator->isSubClassOf("Instruction")) {
- CodeGenInstruction &InstInfo = CDP.getTargetInfo().getInstruction(Operator);
+ const CodeGenInstruction &InstInfo =
+ CDP.getTargetInfo().getInstruction(Operator);
unsigned NumDefsToAdd = InstInfo.Operands.NumDefs;
@@ -2657,7 +2658,7 @@ bool TreePatternNode::ApplyTypeConstraints(TreePattern &TP, bool NotRegisters) {
if (getOperator()->isSubClassOf("Instruction")) {
const DAGInstruction &Inst = CDP.getInstruction(getOperator());
- CodeGenInstruction &InstInfo =
+ const CodeGenInstruction &InstInfo =
CDP.getTargetInfo().getInstruction(getOperator());
bool MadeChange = false;
@@ -3871,7 +3872,7 @@ static void getInstructionsInTree(TreePatternNode &Tree,
/// Check the class of a pattern leaf node against the instruction operand it
/// represents.
-static bool checkOperandClass(CGIOperandList::OperandInfo &OI,
+static bool checkOperandClass(const CGIOperandList::OperandInfo &OI,
const Record *Leaf) {
if (OI.Rec == Leaf)
return true;
@@ -3888,7 +3889,7 @@ static bool checkOperandClass(CGIOperandList::OperandInfo &OI,
return false;
}
-void CodeGenDAGPatterns::parseInstructionPattern(CodeGenInstruction &CGI,
+void CodeGenDAGPatterns::parseInstructionPattern(const CodeGenInstruction &CGI,
const ListInit *Pat,
DAGInstMap &DAGInsts) {
@@ -3987,7 +3988,7 @@ void CodeGenDAGPatterns::parseInstructionPattern(CodeGenInstruction &CGI,
std::vector<TreePatternNodePtr> ResultNodeOperands;
std::vector<const Record *> Operands;
for (unsigned i = NumResults, e = CGI.Operands.size(); i != e; ++i) {
- CGIOperandList::OperandInfo &Op = CGI.Operands[i];
+ const CGIOperandList::OperandInfo &Op = CGI.Operands[i];
StringRef OpName = Op.Name;
if (OpName.empty()) {
I.error("Operand #" + Twine(i) + " in operands list has no name!");
@@ -4093,7 +4094,7 @@ void CodeGenDAGPatterns::ParseInstructions() {
std::vector<const Record *> Results;
std::vector<const Record *> Operands;
- CodeGenInstruction &InstInfo = Target.getInstruction(Instr);
+ const CodeGenInstruction &InstInfo = Target.getInstruction(Instr);
if (InstInfo.Operands.size() != 0) {
for (unsigned j = 0, e = InstInfo.Operands.NumDefs; j < e; ++j)
@@ -4112,7 +4113,7 @@ void CodeGenDAGPatterns::ParseInstructions() {
continue; // no pattern.
}
- CodeGenInstruction &CGI = Target.getInstruction(Instr);
+ const CodeGenInstruction &CGI = Target.getInstruction(Instr);
parseInstructionPattern(CGI, LI, Instructions);
}
diff --git a/llvm/utils/TableGen/Common/CodeGenDAGPatterns.h b/llvm/utils/TableGen/Common/CodeGenDAGPatterns.h
index aa9a0a442424d..24e509868dce4 100644
--- a/llvm/utils/TableGen/Common/CodeGenDAGPatterns.h
+++ b/llvm/utils/TableGen/Common/CodeGenDAGPatterns.h
@@ -1224,8 +1224,8 @@ class CodeGenDAGPatterns {
/// Parse the Pattern for an instruction, and insert the result in DAGInsts.
using DAGInstMap = std::map<const Record *, DAGInstruction, LessRecordByID>;
- void parseInstructionPattern(CodeGenInstruction &CGI, const ListInit *Pattern,
- DAGInstMap &DAGInsts);
+ void parseInstructionPattern(const CodeGenInstruction &CGI,
+ const ListInit *Pattern, DAGInstMap &DAGInsts);
const DAGInstruction &getInstruction(const Record *R) const {
auto F = Instructions.find(R);
diff --git a/llvm/utils/TableGen/Common/CodeGenInstAlias.h b/llvm/utils/TableGen/Common/CodeGenInstAlias.h
index e9f603125d678..1cb68d6102748 100644
--- a/llvm/utils/TableGen/Common/CodeGenInstAlias.h
+++ b/llvm/utils/TableGen/Common/CodeGenInstAlias.h
@@ -41,7 +41,7 @@ class CodeGenInstAlias {
/// ResultInst - The instruction generated by the alias (decoded from
/// Result).
- CodeGenInstruction *ResultInst;
+ const CodeGenInstruction *ResultInst;
class ResultOperand {
std::string Name;
diff --git a/llvm/utils/TableGen/DAGISelEmitter.cpp b/llvm/utils/TableGen/DAGISelEmitter.cpp
index 6d6d72eb70a5b..aaea963d5fde4 100644
--- a/llvm/utils/TableGen/DAGISelEmitter.cpp
+++ b/llvm/utils/TableGen/DAGISelEmitter.cpp
@@ -51,7 +51,7 @@ static unsigned getResultPatternCost(const TreePatternNode &P,
const Record *Op = P.getOperator();
if (Op->isSubClassOf("Instruction")) {
Cost++;
- CodeGenInstruction &II = CGP.getTargetInfo().getInstruction(Op);
+ const CodeGenInstruction &II = CGP.getTargetInfo().getInstruction(Op);
if (II.usesCustomInserter)
Cost += 10;
}
diff --git a/llvm/utils/TableGen/DAGISelMatcherGen.cpp b/llvm/utils/TableGen/DAGISelMatcherGen.cpp
index d84bfa8d0c92e..afc75f1ecf4af 100644
--- a/llvm/utils/TableGen/DAGISelMatcherGen.cpp
+++ b/llvm/utils/TableGen/DAGISelMatcherGen.cpp
@@ -690,7 +690,7 @@ void MatcherGen::EmitResultLeafAsOperand(const TreePatternNode &N,
MVT::SimpleValueType ResultVT = N.getSimpleType(0);
auto IDOperandNo = NextRecordedOperandNo++;
const Record *ImpDef = Def->getRecords().getDef("IMPLICIT_DEF");
- CodeGenInstruction &II = CGP.getTargetInfo().getInstruction(ImpDef);
+ const CodeGenInstruction &II = CGP.getTargetInfo().getInstruction(ImpDef);
AddMatcher(new EmitNodeMatcher(II, ResultVT, {}, false, false, false,
false, -1, IDOperandNo));
ResultOps.push_back(IDOperandNo);
@@ -749,7 +749,7 @@ static bool mayInstNodeLoadOrStore(const TreePatternNode &N,
const CodeGenDAGPatterns &CGP) {
const Record *Op = N.getOperator();
const CodeGenTarget &CGT = CGP.getTargetInfo();
- CodeGenInstruction &II = CGT.getInstruction(Op);
+ const CodeGenInstruction &II = CGT.getInstruction(Op);
return II.mayLoad || II.mayStore;
}
@@ -776,7 +776,7 @@ void MatcherGen::EmitResultInstructionAsOperand(
const TreePatternNode &N, SmallVectorImpl<unsigned> &OutputOps) {
const Record *Op = N.getOperator();
const CodeGenTarget &CGT = CGP.getTargetInfo();
- CodeGenInstruction &II = CGT.getInstruction(Op);
+ const CodeGenInstruction &II = CGT.getInstruction(Op);
const DAGInstruction &Inst = CGP.getInstruction(Op);
bool isRoot = &N == &Pattern.getDstPattern();
@@ -1046,7 +1046,7 @@ void MatcherGen::EmitResultCode() {
const TreePatternNode &DstPat = Pattern.getDstPattern();
if (!DstPat.isLeaf() && DstPat.getOperator()->isSubClassOf("Instruction")) {
const CodeGenTarget &CGT = CGP.getTargetInfo();
- CodeGenInstruction &II = CGT.getInstruction(DstPat.getOperator());
+ const CodeGenInstruction &II = CGT.getInstruction(DstPat.getOperator());
if (II.HasOneImplicitDefWithKnownVT(CGT) != MVT::Other)
HandledReg = II.ImplicitDefs[0];
diff --git a/llvm/utils/TableGen/FastISelEmitter.cpp b/llvm/utils/TableGen/FastISelEmitter.cpp
index ed05af05572c2..5ba79a1b48eea 100644
--- a/llvm/utils/TableGen/FastISelEmitter.cpp
+++ b/llvm/utils/TableGen/FastISelEmitter.cpp
@@ -440,7 +440,7 @@ void FastISelMap::collectPatterns(const CodeGenDAGPatterns &CGP) {
const Record *Op = Dst.getOperator();
if (!Op->isSubClassOf("Instruction"))
continue;
- CodeGenInstruction &Inst = CGP.getTargetInfo().getInstruction(Op);
+ const CodeGenInstruction &Inst = CGP.getTargetInfo().getInstruction(Op);
if (Inst.Operands.empty())
continue;
diff --git a/llvm/utils/TableGen/GlobalISelEmitter.cpp b/llvm/utils/TableGen/GlobalISelEmitter.cpp
index f7993ce0b845d..52da845c19af0 100644
--- a/llvm/utils/TableGen/GlobalISelEmitter.cpp
+++ b/llvm/utils/TableGen/GlobalISelEmitter.cpp
@@ -282,7 +282,7 @@ static Expected<LLTCodeGen> getInstResultType(const TreePatternNode &Dst,
// While we allow more than one output (both implicit and explicit defs)
// below, we only expect one explicit def here.
assert(Dst.getOperator()->isSubClassOf("Instruction"));
- CodeGenInstruction &InstInfo = Target.getInstruction(Dst.getOperator());
+ const CodeGenInstruction &InstInfo = Target.getInstruction(Dst.getOperator());
if (!InstInfo.Operands.NumDefs)
return failedImport("Dst pattern child needs a def");
@@ -1513,7 +1513,7 @@ GlobalISelEmitter::createInstructionRenderer(action_iterator InsertPt,
"Pattern operator isn't an instruction (it's a ValueType)");
return failedImport("Pattern operator isn't an instruction");
}
- CodeGenInstruction *DstI = &Target.getInstruction(DstOp);
+ const CodeGenInstruction *DstI = &Target.getInstruction(DstOp);
// COPY_TO_REGCLASS is just a copy with a ConstrainOperandToRegClassAction
// attached. Similarly for EXTRACT_SUBREG except that's a subregister copy.
@@ -1597,7 +1597,8 @@ Expected<action_iterator> GlobalISelEmitter::importExplicitUseRenderers(
action_iterator InsertPt, RuleMatcher &M, BuildMIAction &DstMIBuilder,
const TreePatternNode &Dst) const {
const CodeGenInstruction *DstI = DstMIBuilder.getCGI();
- CodeGenInstruction *OrigDstI = &Target.getInstruction(Dst.getOperator());
+ const CodeGenInstruction *OrigDstI =
+ &Target.getInstruction(Dst.getOperator());
StringRef Name = OrigDstI->getName();
unsigned ExpectedDstINumUses = Dst.getNumChildren();
@@ -2140,7 +2141,7 @@ Expected<RuleMatcher> GlobalISelEmitter::runOnPattern(const PatternToMatch &P) {
// We need to replace the def and all its uses with the specified
// operand. However, we must also insert COPY's wherever needed.
// For now, emit a copy and let the register allocator clean up.
- auto &DstI = Target.getInstruction(RK.getDef("COPY"));
+ const CodeGenInstruction &DstI = Target.getInstruction(RK.getDef("COPY"));
const auto &DstIOperand = DstI.Operands[0];
OperandMatcher &OM0 = InsnMatcher.getOperand(0);
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arsenm
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Nov 23, 2025
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LLVM Buildbot has detected a new failure on builder Full details are available at: https://lab.llvm.org/buildbot/#/builders/186/builds/14187 Here is the relevant piece of the build log for the reference |
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