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Support x86 builtin rotate #169218

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Support x86 builtin rotate #169218

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973d30d
[CIR] Implement x86 rotate builtins
moar55 Nov 20, 2025
3007eb2
update and add test
moar55 Nov 23, 2025
64d7a1a
remove local file, fix formatting issues
moar55 Nov 23, 2025
9973b68
remove local file
moar55 Nov 23, 2025
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27 changes: 27 additions & 0 deletions clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -13,6 +13,7 @@

#include "CIRGenFunction.h"
#include "CIRGenModule.h"
#include "mlir/IR/ValueRange.h"
#include "clang/Basic/Builtins.h"
#include "clang/Basic/TargetBuiltins.h"
#include "clang/CIR/MissingFeatures.h"
Expand Down Expand Up @@ -68,6 +69,26 @@ static mlir::Value emitVectorFCmp(CIRGenBuilderTy &builder,
return bitCast;
}

static mlir::Value emitX86FunnelShift(CIRGenFunction &cgf, const CallExpr *e,
mlir::Value &op0, mlir::Value &op1,
mlir::Value &amt, bool isRight) {
auto ty = op0.getType();

// Amount may be scalar immediate, in which case create a splat vector.
// Funnel shifts amounts are treated as modulo and types are all power-of-2
// so we only care about the lowest log2 bits anyway.
if (amt.getType() != ty) {
amt = cgf.getBuilder().createIntCast(
amt, mlir::cast<cir::VectorType>(ty).getElementType());
amt = cir::VecSplatOp::create(cgf.getBuilder(), cgf.getLoc(e->getExprLoc()),
ty, amt);
}

const std::string intrinsicName = isRight ? "fshr" : "fshl";
return emitIntrinsicCallOp(cgf, e, intrinsicName, ty,
mlir::ValueRange{op0, op1, amt});
}

mlir::Value CIRGenFunction::emitX86BuiltinExpr(unsigned builtinID,
const CallExpr *expr) {
if (builtinID == Builtin::BI__builtin_cpu_is) {
Expand Down Expand Up @@ -583,6 +604,10 @@ mlir::Value CIRGenFunction::emitX86BuiltinExpr(unsigned builtinID,
case X86::BI__builtin_ia32_kshiftrihi:
case X86::BI__builtin_ia32_kshiftrisi:
case X86::BI__builtin_ia32_kshiftridi:
cgm.errorNYI(expr->getSourceRange(),
std::string("unimplemented X86 builtin call: ") +
getContext().BuiltinInfo.getName(builtinID));
return {};
case X86::BI__builtin_ia32_vprotbi:
case X86::BI__builtin_ia32_vprotwi:
case X86::BI__builtin_ia32_vprotdi:
Expand All @@ -593,12 +618,14 @@ mlir::Value CIRGenFunction::emitX86BuiltinExpr(unsigned builtinID,
case X86::BI__builtin_ia32_prolq128:
case X86::BI__builtin_ia32_prolq256:
case X86::BI__builtin_ia32_prolq512:
return emitX86FunnelShift(*this, expr, ops[0], ops[1], ops[1], false);
case X86::BI__builtin_ia32_prord128:
case X86::BI__builtin_ia32_prord256:
case X86::BI__builtin_ia32_prord512:
case X86::BI__builtin_ia32_prorq128:
case X86::BI__builtin_ia32_prorq256:
case X86::BI__builtin_ia32_prorq512:
return emitX86FunnelShift(*this, expr, ops[0], ops[1], ops[1], true);
case X86::BI__builtin_ia32_selectb_128:
case X86::BI__builtin_ia32_selectb_256:
case X86::BI__builtin_ia32_selectb_512:
Expand Down
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