Skip to content

[AArch64] [test] Minor fixes for SEH unwind opcode tests #169920

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 5 commits into from
Dec 2, 2025
+86 −64
Merged

[AArch64] [test] Minor fixes for SEH unwind opcode tests #169920

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
5 commits
Select commit Hold shift + click to select a range
3e5b86c
[AArch64] [test] Write the seh.s test output object to a file
mstorsjo Nov 28, 2025
e50ac8a
[AArch64] [test] Move tests for custom unwind opcodes to a separate f…
mstorsjo Nov 28, 2025
9e27fef
[AArch64] [test] Fix stack allocation instructions in the seh.s test
mstorsjo Nov 28, 2025
4a619a7
[AArch64] [test] Spell out the matching instructions for SVE unwind o…
mstorsjo Nov 28, 2025
4580350
[AArch64] [test] Make unwind info tests actually use the right instru…
mstorsjo Nov 28, 2025
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
38 changes: 19 additions & 19 deletions llvm/test/MC/AArch64/seh-large-func-multi-epilog.s
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -198,7 +198,7 @@ multi_epilog:
.seh_save_regp x25, 192
stp x27, x28, [sp, #176]
.seh_save_regp x27, 176
mov x29, fp
mov x29, sp
.seh_set_fp
.seh_endprologue
.rept 30
Expand All @@ -210,13 +210,13 @@ multi_epilog:
.seh_startepilogue
mov sp, x29
.seh_set_fp
stp x27, x28, [sp, #176]
ldp x27, x28, [sp, #176]
.seh_save_regp x27, 176
stp x25, x26, [sp, #192]
ldp x25, x26, [sp, #192]
.seh_save_regp x25, 192
stp x23, x24, [sp, #208]
ldp x23, x24, [sp, #208]
.seh_save_regp x23, 208
stp x21, x22, [sp, #224]
ldp x21, x22, [sp, #224]
.seh_save_regp x21, 224
ldp x19, x20, [sp, #240]
.seh_save_regp x19, 240
Expand All @@ -226,11 +226,11 @@ multi_epilog:
ret
// epilog2 - a subsequence at the end of prolog, can use prolog's opcodes.
.seh_startepilogue
stp x25, x26, [sp, #192]
ldp x25, x26, [sp, #192]
.seh_save_regp x25, 192
stp x23, x24, [sp, #208]
ldp x23, x24, [sp, #208]
.seh_save_regp x23, 208
stp x21, x22, [sp, #224]
ldp x21, x22, [sp, #224]
.seh_save_regp x21, 224
ldp x19, x20, [sp, #240]
.seh_save_regp x19, 240
Expand All @@ -242,9 +242,9 @@ multi_epilog:
.seh_startepilogue
mov sp, x29
.seh_set_fp
stp x23, x24, [sp, #208]
ldp x23, x24, [sp, #208]
.seh_save_regp x23, 208
stp x21, x22, [sp, #224]
ldp x21, x22, [sp, #224]
.seh_save_regp x21, 224
ldp x19, x20, [sp, #240]
.seh_save_regp x19, 240
Expand All @@ -261,13 +261,13 @@ multi_epilog:
.seh_startepilogue
mov sp, x29
.seh_set_fp
stp x27, x28, [sp, #176]
ldp x27, x28, [sp, #176]
.seh_save_regp x27, 176
stp x25, x26, [sp, #192]
ldp x25, x26, [sp, #192]
.seh_save_regp x25, 192
stp x23, x24, [sp, #208]
ldp x23, x24, [sp, #208]
.seh_save_regp x23, 208
stp x21, x22, [sp, #224]
ldp x21, x22, [sp, #224]
.seh_save_regp x21, 224
ldp x19, x20, [sp, #240]
.seh_save_regp x19, 240
Expand All @@ -277,11 +277,11 @@ multi_epilog:
ret
// epilog5 - same as epilog2, its start index should be: 1 + epilog2's index.
.seh_startepilogue
stp x25, x26, [sp, #192]
ldp x25, x26, [sp, #192]
.seh_save_regp x25, 192
stp x23, x24, [sp, #208]
ldp x23, x24, [sp, #208]
.seh_save_regp x23, 208
stp x21, x22, [sp, #224]
ldp x21, x22, [sp, #224]
.seh_save_regp x21, 224
ldp x19, x20, [sp, #240]
.seh_save_regp x19, 240
Expand All @@ -294,9 +294,9 @@ multi_epilog:
.seh_startepilogue
mov sp, x29
.seh_set_fp
stp x23, x24, [sp, #208]
ldp x23, x24, [sp, #208]
.seh_save_regp x23, 208
stp x21, x22, [sp, #224]
ldp x21, x22, [sp, #224]
.seh_save_regp x21, 224
ldp x19, x20, [sp, #240]
.seh_save_regp x19, 240
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/MC/AArch64/seh-packed-epilog.s
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -126,7 +126,7 @@ func:
.seh_set_fp
ldp x29, x30, [sp, #16]
.seh_save_fplr 16
ldp x29, x30, [sp, #-48]!
ldp x29, x30, [sp], #48
.seh_save_fplr_x 48
ldp x21, x22, [sp, #16]
.seh_save_next
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/MC/AArch64/seh-packed-unwind.s
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -892,7 +892,7 @@ nonpacked1:
// Can't be packed; can't save integer registers after float registers.
stp d8, d9, [sp, #-32]!
.seh_save_fregp_x d8, 32
stp x19, x20, [sp, #16]!
stp x19, x20, [sp, #16]
.seh_save_regp x19, 16
.seh_endprologue
nop
Expand Down Expand Up @@ -1010,7 +1010,7 @@ nonpacked6:
.seh_startepilogue
mov sp, x29
.seh_set_fp
ldp x29, lr, [sp], #32
ldp x29, lr, [sp], #16
.seh_save_fplr_x 16
ldr lr, [sp, #16]
.seh_save_reg lr, 16
Expand Down
106 changes: 64 additions & 42 deletions llvm/test/MC/AArch64/seh.s
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -1,6 +1,7 @@
// This test checks that the SEH directives emit the correct unwind data.

// RUN: llvm-mc -triple aarch64-pc-win32 -filetype=obj %s | llvm-readobj -S -r -u - | FileCheck %s
// RUN: llvm-mc -triple aarch64-pc-win32 -filetype=obj %s -o %t.o
// RUN: llvm-readobj -S -r -u %t.o | FileCheck %s

// Check that the output assembler directives also can be parsed, and
// that they produce equivalent output:
Expand All @@ -20,7 +21,7 @@
// CHECK-NEXT: }
// CHECK: Section {
// CHECK: Name: .xdata
// CHECK: RawDataSize: 100
// CHECK: RawDataSize: 108
// CHECK: RelocationCount: 1
// CHECK: Characteristics [
// CHECK-NEXT: ALIGN_4BYTES
Expand All @@ -30,7 +31,7 @@
// CHECK-NEXT: }
// CHECK: Section {
// CHECK: Name: .pdata
// CHECK: RelocationCount: 2
// CHECK: RelocationCount: 4
// CHECK: Characteristics [
// CHECK-NEXT: ALIGN_4BYTES
// CHECK-NEXT: CNT_INITIALIZED_DATA
Expand All @@ -41,11 +42,13 @@

// CHECK-NEXT: Relocations [
// CHECK-NEXT: Section (4) .xdata {
// CHECK-NEXT: 0x58 IMAGE_REL_ARM64_ADDR32NB __C_specific_handler
// CHECK-NEXT: 0x54 IMAGE_REL_ARM64_ADDR32NB __C_specific_handler
// CHECK-NEXT: }
// CHECK-NEXT: Section (5) .pdata {
// CHECK-NEXT: 0x0 IMAGE_REL_ARM64_ADDR32NB .text
// CHECK-NEXT: 0x4 IMAGE_REL_ARM64_ADDR32NB .xdata
// CHECK-NEXT: 0x8 IMAGE_REL_ARM64_ADDR32NB .text
// CHECK-NEXT: 0xC IMAGE_REL_ARM64_ADDR32NB .xdata
// CHECK-NEXT: }
// CHECK-NEXT: ]

Expand All @@ -54,7 +57,7 @@
// CHECK-NEXT: Function: func
// CHECK-NEXT: ExceptionRecord: .xdata
// CHECK-NEXT: ExceptionData {
// CHECK-NEXT: FunctionLength: 172
// CHECK-NEXT: FunctionLength: 148
// CHECK: Prologue [
// CHECK-NEXT: 0xe716c3 ; str p6, [sp, #3, mul vl]
// CHECK-NEXT: 0xe703c5 ; str z11, [sp, #5, mul vl]
Expand All @@ -72,11 +75,6 @@
// CHECK-NEXT: 0xe74104 ; stp x1, x2, [sp, #64]
// CHECK-NEXT: 0xe70008 ; str x0, [sp, #64]
// CHECK-NEXT: 0xfc ; pacibsp
// CHECK-NEXT: 0xec ; clear unwound to call
// CHECK-NEXT: 0xeb ; EC context
// CHECK-NEXT: 0xea ; context
// CHECK-NEXT: 0xe9 ; machine frame
// CHECK-NEXT: 0xe8 ; trap frame
// CHECK-NEXT: 0xe3 ; nop
// CHECK-NEXT: 0xe202 ; add fp, sp, #16
// CHECK-NEXT: 0xdd41 ; str d13, [sp, #8]
Expand All @@ -99,8 +97,8 @@
// CHECK-NEXT: ]
// CHECK-NEXT: EpilogueScopes [
// CHECK-NEXT: EpilogueScope {
// CHECK-NEXT: StartOffset: 41
// CHECK-NEXT: EpilogueStartIndex: 77
// CHECK-NEXT: StartOffset: 35
// CHECK-NEXT: EpilogueStartIndex: 72
// CHECK-NEXT: Opcodes [
// CHECK-NEXT: 0x01 ; add sp, #16
// CHECK-NEXT: 0xe4 ; end
Expand All @@ -113,9 +111,28 @@
// CHECK-NEXT: ]
// CHECK-NEXT: }
// CHECK-NEXT: }
// CHECK-NEXT: RuntimeFunction {
// CHECK-NEXT: Function: customfunc
// CHECK-NEXT: ExceptionRecord: .xdata
// CHECK-NEXT: ExceptionData {
// CHECK-NEXT: FunctionLength: 24
// CHECK: Prologue [
// CHECK-NEXT: 0xec ; clear unwound to call
// CHECK-NEXT: 0xeb ; EC context
// CHECK-NEXT: 0xea ; context
// CHECK-NEXT: 0xe9 ; machine frame
// CHECK-NEXT: 0xe8 ; trap frame
// CHECK-NEXT: 0xe4 ; end
// CHECK-NEXT: ]
// CHECK-NEXT: EpilogueScopes [
// CHECK-NEXT: ]
// CHECK-NEXT: }
// CHECK-NEXT: }
// CHECK-NEXT: ]


.arch_extension sve

.text
.globl func
.def func
Expand All @@ -124,8 +141,8 @@
.endef
.seh_proc func
func:
sub sp, sp, #24
.seh_stackalloc 24
sub sp, sp, #16
.seh_stackalloc 16
mov x29, sp
.seh_set_fp
stp x29, x30, [sp, #-32]!
Expand Down Expand Up @@ -160,54 +177,43 @@ func:
.seh_add_fp 16
nop
.seh_nop
nop
.seh_trap_frame
nop
.seh_pushframe
nop
.seh_context
nop
.seh_ec_context
nop
.seh_clear_unwound_to_call
pacibsp
.seh_pac_sign_lr
nop
str x0, [sp, #64]
.seh_save_any_reg x0, 64
nop
stp x1, x2, [sp, #64]
.seh_save_any_reg_p x1, 64
nop
str d29, [sp, #64]
.seh_save_any_reg d29, 64
nop
stp d4, d5, [sp, #64]
.seh_save_any_reg_p d4, 64
nop
str q30, [sp, #64]
.seh_save_any_reg q30, 64
nop
stp q3, q4, [sp, #64]
.seh_save_any_reg_p q3, 64
nop
str x30, [sp, #-64]!
.seh_save_any_reg_x lr, 64
nop
stp x29, x30, [sp, #-64]!
.seh_save_any_reg_px fp, 64
nop
str d31, [sp, #-64]!
.seh_save_any_reg_x d31, 64
nop
stp d2, d3, [sp, #-64]!
.seh_save_any_reg_px d2, 64
nop
str q29, [sp, #-64]!
.seh_save_any_reg_x q29, 64
nop
stp q9, q10, [sp, #-64]!
.seh_save_any_reg_px q9, 64
nop
addvl sp, sp, #-5
.seh_allocz 5
nop
str z11, [sp, #5, mul vl]
.seh_save_zreg z11, 5
nop
str p6, [sp, #3, mul vl]
.seh_save_preg p6, 3
nop
.seh_endprologue
nop
.seh_startepilogue
add sp, sp, #24
.seh_stackalloc 24
add sp, sp, #16
.seh_stackalloc 16
.seh_endepilogue
ret
.seh_handler __C_specific_handler, @except
Expand All @@ -216,6 +222,22 @@ func:
.text
.seh_endproc

.seh_proc customfunc
customfunc:
nop
.seh_trap_frame
nop
.seh_pushframe
nop
.seh_context
nop
.seh_ec_context
nop
.seh_clear_unwound_to_call
.seh_endprologue
ret
.seh_endproc

// Function with no .seh directives; no pdata/xdata entries are
// generated.
.globl smallFunc
Expand Down
Loading