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[ValueTracking] Support scalable vector splats in computeKnownBits #170345

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Merged
merged 2 commits into from
Dec 3, 2025
Merged

[ValueTracking] Support scalable vector splats in computeKnownBits #170345

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9e9a994
[InstCombine] Add pre-commit tests. NFC.
dtcxzyw Dec 2, 2025
06211cd
[ValueTracking] Support scalable vector splats in computeKnownBits
dtcxzyw Dec 2, 2025
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5 changes: 5 additions & 0 deletions llvm/lib/Analysis/ValueTracking.cpp
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Expand Up @@ -2249,6 +2249,11 @@ static void computeKnownBitsFromOperator(const Operator *I,
break;
}
case Instruction::ShuffleVector: {
if (auto *Splat = getSplatValue(I)) {
computeKnownBits(Splat, Known, Q, Depth + 1);
break;
}

auto *Shuf = dyn_cast<ShuffleVectorInst>(I);
// FIXME: Do we need to handle ConstantExpr involving shufflevectors?
if (!Shuf) {
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17 changes: 17 additions & 0 deletions llvm/test/Transforms/InstCombine/known-bits.ll
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Expand Up @@ -2425,6 +2425,23 @@ exit:
ret i8 %or2
}

define <vscale x 4 x i32> @scalable_add_to_disjoint_or(i8 %x, <vscale x 4 x i32> range(i32 0, 256) %rhs) {
; CHECK-LABEL: @scalable_add_to_disjoint_or(
; CHECK-NEXT: [[EXTX:%.*]] = zext i8 [[X:%.*]] to i32
; CHECK-NEXT: [[SHIFT:%.*]] = shl nuw nsw i32 [[EXTX]], 8
; CHECK-NEXT: [[INSERT:%.*]] = insertelement <vscale x 4 x i32> poison, i32 [[SHIFT]], i64 0
; CHECK-NEXT: [[SPLAT:%.*]] = shufflevector <vscale x 4 x i32> [[INSERT]], <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer
; CHECK-NEXT: [[ADD:%.*]] = or disjoint <vscale x 4 x i32> [[SPLAT]], [[RHS:%.*]]
; CHECK-NEXT: ret <vscale x 4 x i32> [[ADD]]
;
%extx = zext i8 %x to i32
%shift = shl nuw nsw i32 %extx, 8
%insert = insertelement <vscale x 4 x i32> poison, i32 %shift, i32 0
%splat = shufflevector <vscale x 4 x i32> %insert, <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer
%add = add <vscale x 4 x i32> %splat, %rhs
ret <vscale x 4 x i32> %add
}

declare void @dummy()
declare void @use(i1)
declare void @sink(i8)
6 changes: 3 additions & 3 deletions llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll
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Expand Up @@ -1197,8 +1197,8 @@ define void @PR27626_5(ptr %a, i32 %x, i32 %y, i32 %z, i64 %n) #1 {
; CHECK: vector.body:
; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
; CHECK-NEXT: [[VEC_IND:%.*]] = phi <vscale x 4 x i64> [ [[INDUCTION]], [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[VECTOR_BODY]] ]
; CHECK-NEXT: [[TMP13:%.*]] = add <vscale x 4 x i64> [[VEC_IND]], splat (i64 -1)
; CHECK-NEXT: [[TMP14:%.*]] = add <vscale x 4 x i64> [[VEC_IND]], splat (i64 -3)
; CHECK-NEXT: [[TMP13:%.*]] = add nsw <vscale x 4 x i64> [[VEC_IND]], splat (i64 -1)
; CHECK-NEXT: [[TMP14:%.*]] = add nsw <vscale x 4 x i64> [[VEC_IND]], splat (i64 -3)
; CHECK-NEXT: [[TMP15:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], <vscale x 4 x i64> [[VEC_IND]]
; CHECK-NEXT: [[TMP16:%.*]] = getelementptr inbounds i32, ptr [[A]], <vscale x 4 x i64> [[TMP13]]
; CHECK-NEXT: [[TMP17:%.*]] = getelementptr inbounds i32, ptr [[A]], <vscale x 4 x i64> [[TMP14]]
Expand Down Expand Up @@ -1286,7 +1286,7 @@ define void @PR34743(ptr %a, ptr %b, i64 %n) #1 {
; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
; CHECK-NEXT: [[VECTOR_RECUR:%.*]] = phi <vscale x 4 x i16> [ [[VECTOR_RECUR_INIT]], [[VECTOR_PH]] ], [ [[WIDE_MASKED_GATHER4:%.*]], [[VECTOR_BODY]] ]
; CHECK-NEXT: [[VEC_IND:%.*]] = phi <vscale x 4 x i64> [ [[TMP15]], [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[VECTOR_BODY]] ]
; CHECK-NEXT: [[TMP18:%.*]] = add nuw nsw <vscale x 4 x i64> [[VEC_IND]], splat (i64 1)
; CHECK-NEXT: [[TMP18:%.*]] = or disjoint <vscale x 4 x i64> [[VEC_IND]], splat (i64 1)
; CHECK-NEXT: [[TMP19:%.*]] = add nuw nsw <vscale x 4 x i64> [[VEC_IND]], splat (i64 2)
; CHECK-NEXT: [[TMP20:%.*]] = getelementptr inbounds i16, ptr [[A]], <vscale x 4 x i64> [[TMP18]]
; CHECK-NEXT: [[WIDE_MASKED_GATHER:%.*]] = call <vscale x 4 x i16> @llvm.masked.gather.nxv4i16.nxv4p0(<vscale x 4 x ptr> align 4 [[TMP20]], <vscale x 4 x i1> splat (i1 true), <vscale x 4 x i16> poison), !alias.scope [[META34:![0-9]+]]
Expand Down