-
Notifications
You must be signed in to change notification settings - Fork 15.5k
[GlobalISel](NFC) Refactor construction of LLTs in LegalizerHelper
#170664
New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
[GlobalISel](NFC) Refactor construction of LLTs in LegalizerHelper
#170664
Conversation
|
@llvm/pr-subscribers-llvm-globalisel Author: Nathan Corbyn (cofibrant) ChangesI spotted a number of places where we're duplicating logic provided by the Full diff: https://github.com/llvm/llvm-project/pull/170664.diff 1 Files Affected:
diff --git a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
index 1aa1d465d8da6..b7287db59318f 100644
--- a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
@@ -70,9 +70,8 @@ getNarrowTypeBreakDown(LLT OrigTy, LLT NarrowTy, LLT &LeftoverTy) {
unsigned EltSize = OrigTy.getScalarSizeInBits();
if (LeftoverSize % EltSize != 0)
return {-1, -1};
- LeftoverTy =
- LLT::scalarOrVector(ElementCount::getFixed(LeftoverSize / EltSize),
- OrigTy.getElementType());
+ LeftoverTy = OrigTy.changeElementCount(
+ ElementCount::getFixed(LeftoverSize / EltSize));
} else {
LeftoverTy = LLT::scalar(LeftoverSize);
}
@@ -1560,7 +1559,7 @@ LegalizerHelper::LegalizeResult LegalizerHelper::narrowScalar(MachineInstr &MI,
if (SizeOp0 % NarrowSize != 0) {
LLT ImplicitTy = NarrowTy;
if (DstTy.isVector())
- ImplicitTy = LLT::vector(DstTy.getElementCount(), ImplicitTy);
+ ImplicitTy = DstTy.changeElementType(ImplicitTy);
Register ImplicitReg = MIRBuilder.buildUndef(ImplicitTy).getReg(0);
MIRBuilder.buildAnyExt(DstReg, ImplicitReg);
@@ -3289,7 +3288,7 @@ LegalizerHelper::widenScalar(MachineInstr &MI, unsigned TypeIdx, LLT WideTy) {
Observer.changingInstr(MI);
widenScalarSrc(
- MI, LLT::vector(VecTy.getElementCount(), WideTy.getSizeInBits()), 1,
+ MI, VecTy.changeElementType(LLT::scalar(WideTy.getSizeInBits())), 1,
TargetOpcode::G_ANYEXT);
widenScalarDst(MI, WideTy, 0);
@@ -3321,7 +3320,7 @@ LegalizerHelper::widenScalar(MachineInstr &MI, unsigned TypeIdx, LLT WideTy) {
Register VecReg = MI.getOperand(1).getReg();
LLT VecTy = MRI.getType(VecReg);
- LLT WideVecTy = LLT::vector(VecTy.getElementCount(), WideTy);
+ LLT WideVecTy = VecTy.changeElementType(WideTy);
widenScalarSrc(MI, WideVecTy, 1, TargetOpcode::G_ANYEXT);
widenScalarSrc(MI, WideTy, 2, TargetOpcode::G_ANYEXT);
@@ -3522,9 +3521,7 @@ LegalizerHelper::widenScalar(MachineInstr &MI, unsigned TypeIdx, LLT WideTy) {
Observer.changingInstr(MI);
Register VecReg = MI.getOperand(1).getReg();
LLT VecTy = MRI.getType(VecReg);
- LLT WideVecTy = VecTy.isVector()
- ? LLT::vector(VecTy.getElementCount(), WideTy)
- : WideTy;
+ LLT WideVecTy = VecTy.isVector() ? VecTy.changeElementType(WideTy) : WideTy;
widenScalarSrc(MI, WideVecTy, 1, TargetOpcode::G_FPEXT);
widenScalarDst(MI, WideTy, 0, TargetOpcode::G_FPTRUNC);
Observer.changedInstr(MI);
@@ -3658,7 +3655,8 @@ LegalizerHelper::lowerBitcast(MachineInstr &MI) {
// %3:_(<2 x s8>) = G_BITCAST %2
// %4:_(<2 x s8>) = G_BITCAST %3
// %1:_(<4 x s16>) = G_CONCAT_VECTORS %3, %4
- DstCastTy = LLT::fixed_vector(NumDstElt / NumSrcElt, DstEltTy);
+ DstCastTy = DstEltTy.changeElementCount(
+ ElementCount::getFixed(NumDstElt / NumSrcElt));
SrcPartTy = SrcEltTy;
} else if (NumSrcElt > NumDstElt) { // Source element type is smaller.
//
@@ -3670,7 +3668,8 @@ LegalizerHelper::lowerBitcast(MachineInstr &MI) {
// %3:_(s16) = G_BITCAST %2
// %4:_(s16) = G_BITCAST %3
// %1:_(<2 x s16>) = G_BUILD_VECTOR %3, %4
- SrcPartTy = LLT::fixed_vector(NumSrcElt / NumDstElt, SrcEltTy);
+ SrcPartTy = SrcEltTy.changeElementCount(
+ ElementCount::getFixed(NumSrcElt / NumDstElt));
DstCastTy = DstEltTy;
}
@@ -4231,8 +4230,8 @@ LegalizerHelper::LegalizeResult LegalizerHelper::lowerLoad(GAnyLoad &LoadMI) {
// the size of the load without needing to scalarize it.
if (Alignment.value() * 8 > MemSizeInBits &&
isPowerOf2_64(DstTy.getScalarSizeInBits())) {
- LLT MoreTy = LLT::fixed_vector(NextPowerOf2(DstTy.getNumElements()),
- DstTy.getElementType());
+ LLT MoreTy = DstTy.changeElementCount(
+ ElementCount::getFixed(NextPowerOf2(DstTy.getNumElements())));
MachineMemOperand *NewMMO = MF.getMachineMemOperand(&MMO, 0, MoreTy);
auto NewLoad = MIRBuilder.buildLoad(MoreTy, PtrReg, *NewMMO);
MIRBuilder.buildDeleteTrailingVectorElements(LoadMI.getReg(0),
@@ -5023,8 +5022,7 @@ static void makeDstOps(SmallVectorImpl<DstOp> &DstOps, LLT Ty,
unsigned NumElts) {
LLT LeftoverTy;
assert(Ty.isVector() && "Expected vector type");
- LLT EltTy = Ty.getElementType();
- LLT NarrowTy = (NumElts == 1) ? EltTy : LLT::fixed_vector(NumElts, EltTy);
+ LLT NarrowTy = Ty.changeElementCount(ElementCount::getFixed(NumElts));
int NumParts, NumLeftover;
std::tie(NumParts, NumLeftover) =
getNarrowTypeBreakDown(Ty, NarrowTy, LeftoverTy);
@@ -5705,7 +5703,8 @@ LegalizerHelper::fewerElementsBitcast(MachineInstr &MI, unsigned int TypeIdx,
auto Unmerge = MIRBuilder.buildUnmerge(SrcNarrowTy, SrcReg);
getUnmergeResults(SrcVRegs, *Unmerge);
} else {
- LLT SrcNarrowTy = LLT::fixed_vector(NewElemCount, SrcTy.getElementType());
+ LLT SrcNarrowTy =
+ SrcTy.changeElementCount(ElementCount::getFixed(NewElemCount));
// Split the Src and Dst Reg into smaller registers
if (extractGCDType(SrcVRegs, DstTy, SrcNarrowTy, SrcReg) != SrcNarrowTy)
@@ -6837,8 +6836,7 @@ LegalizerHelper::moreElementsVector(MachineInstr &MI, unsigned TypeIdx,
Observer.changingInstr(MI);
moreElementsVectorSrc(MI, MoreTy, 2);
moreElementsVectorSrc(MI, MoreTy, 3);
- LLT CondTy = LLT::fixed_vector(
- MoreTy.getNumElements(),
+ LLT CondTy = MoreTy.changeElementType(
MRI.getType(MI.getOperand(0).getReg()).getElementType());
moreElementsVectorDst(MI, CondTy, 0);
Observer.changedInstr(MI);
@@ -6930,7 +6928,8 @@ LegalizerHelper::equalizeVectorShuffleLengths(MachineInstr &MI) {
unsigned PaddedMaskNumElts = alignTo(MaskNumElts, SrcNumElts);
unsigned NumConcat = PaddedMaskNumElts / SrcNumElts;
- LLT PaddedTy = LLT::fixed_vector(PaddedMaskNumElts, DestEltTy);
+ LLT PaddedTy =
+ DstTy.changeElementCount(ElementCount::getFixed(PaddedMaskNumElts));
// Create new source vectors by concatenating the initial
// source vectors with undefined vectors of the same size.
@@ -9896,7 +9895,7 @@ LegalizerHelper::lowerISFPCLASS(MachineInstr &MI) {
LLT IntTy = LLT::scalar(BitSize);
if (SrcTy.isVector())
- IntTy = LLT::vector(SrcTy.getElementCount(), IntTy);
+ IntTy = SrcTy.changeElementType(IntTy);
auto AsInt = MIRBuilder.buildCopy(IntTy, SrcReg);
// Various masks.
|
027616a to
c522282
Compare
| Observer.changingInstr(MI); | ||
|
|
||
| widenScalarSrc( | ||
| MI, LLT::vector(VecTy.getElementCount(), WideTy.getSizeInBits()), 1, |
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
The cases directly using LLT::vector/fixed_vector are slightly different, since this doesn't handle scalar inputs which are presumed impossible. This is a direct replacement for the scalarOrVector cases
c522282 to
e837555
Compare
I spotted a number of places where we're duplicating logic provided by the
LLTclass inline inLegalizerHelper. This PR tidies up these spots.