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4 changes: 3 additions & 1 deletion llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -44,7 +44,8 @@ void AMDGPUInstPrinter::printRegName(raw_ostream &OS, MCRegister Reg) {
void AMDGPUInstPrinter::printInst(const MCInst *MI, uint64_t Address,
StringRef Annot, const MCSubtargetInfo &STI,
raw_ostream &OS) {
printInstruction(MI, Address, STI, OS);
if (!PrintAliases || !printAliasInstr(MI, Address, STI, OS))
printInstruction(MI, Address, STI, OS);
printAnnotation(OS, Annot);
}

Expand Down Expand Up @@ -1944,4 +1945,5 @@ void AMDGPUInstPrinter::printScaleSel(const MCInst *MI, unsigned OpNo,
O << " scale_sel:" << formatDec(Imm);
}

#define PRINT_ALIAS_INSTR
#include "AMDGPUGenAsmWriter.inc"
5 changes: 5 additions & 0 deletions llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.h
Original file line number Diff line number Diff line change
Expand Up @@ -39,6 +39,11 @@ class AMDGPUInstPrinter : public MCInstPrinter {
raw_ostream &O, const MCRegisterInfo &MRI);

private:
bool printAliasInstr(const MCInst *MI, uint64_t Address,
const MCSubtargetInfo &STI, raw_ostream &OS);
void printCustomAliasOperand(const MCInst *MI, uint64_t Address,
unsigned OpIdx, unsigned PrintMethodIdx,
const MCSubtargetInfo &STI, raw_ostream &OS);
void printU16ImmOperand(const MCInst *MI, unsigned OpNo,
const MCSubtargetInfo &STI, raw_ostream &O);
void printU16ImmDecOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
Expand Down
8 changes: 4 additions & 4 deletions llvm/test/CodeGen/AMDGPU/max.ll
Original file line number Diff line number Diff line change
Expand Up @@ -1120,7 +1120,7 @@ define amdgpu_kernel void @test_umax_ugt_i64(ptr addrspace(1) %out, i64 %a, i64
; SI-NEXT: s_mov_b32 s4, s0
; SI-NEXT: v_mov_b32_e32 v0, s8
; SI-NEXT: v_mov_b32_e32 v1, s9
; SI-NEXT: v_cmp_gt_u64_e32 vcc, s[2:3], v[0:1]
; SI-NEXT: V_CMP_GT_U64 vcc, s[2:3], v[0:1]
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We definitely don't want to switch to all caps instruction names

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Yeah I have no idea why it's suddenly using these aliases. Haven't had a chance to look into it. Maybe there are some InstAlias instantiations with Emit=1 that were being ignored previously

; SI-NEXT: s_mov_b32 s5, s1
; SI-NEXT: s_and_b64 s[0:1], vcc, exec
; SI-NEXT: s_cselect_b32 s0, s3, s9
Expand Down Expand Up @@ -1174,7 +1174,7 @@ define amdgpu_kernel void @test_umax_uge_i64(ptr addrspace(1) %out, i64 %a, i64
; SI-NEXT: s_mov_b32 s4, s0
; SI-NEXT: v_mov_b32_e32 v0, s8
; SI-NEXT: v_mov_b32_e32 v1, s9
; SI-NEXT: v_cmp_ge_u64_e32 vcc, s[2:3], v[0:1]
; SI-NEXT: V_CMP_GE_U64 vcc, s[2:3], v[0:1]
; SI-NEXT: s_mov_b32 s5, s1
; SI-NEXT: s_and_b64 s[0:1], vcc, exec
; SI-NEXT: s_cselect_b32 s0, s3, s9
Expand Down Expand Up @@ -1228,7 +1228,7 @@ define amdgpu_kernel void @test_imax_sgt_i64(ptr addrspace(1) %out, i64 %a, i64
; SI-NEXT: s_mov_b32 s4, s0
; SI-NEXT: v_mov_b32_e32 v0, s8
; SI-NEXT: v_mov_b32_e32 v1, s9
; SI-NEXT: v_cmp_gt_i64_e32 vcc, s[2:3], v[0:1]
; SI-NEXT: V_CMP_GT_I64 vcc, s[2:3], v[0:1]
; SI-NEXT: s_mov_b32 s5, s1
; SI-NEXT: s_and_b64 s[0:1], vcc, exec
; SI-NEXT: s_cselect_b32 s0, s3, s9
Expand Down Expand Up @@ -1282,7 +1282,7 @@ define amdgpu_kernel void @test_imax_sge_i64(ptr addrspace(1) %out, i64 %a, i64
; SI-NEXT: s_mov_b32 s4, s0
; SI-NEXT: v_mov_b32_e32 v0, s8
; SI-NEXT: v_mov_b32_e32 v1, s9
; SI-NEXT: v_cmp_ge_i64_e32 vcc, s[2:3], v[0:1]
; SI-NEXT: V_CMP_GE_I64 vcc, s[2:3], v[0:1]
; SI-NEXT: s_mov_b32 s5, s1
; SI-NEXT: s_and_b64 s[0:1], vcc, exec
; SI-NEXT: s_cselect_b32 s0, s3, s9
Expand Down
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