[CIR] Upstream CXXNoexceptExpr #171462
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[CIR] Upstream CXXNoexceptExpr #171462
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AmrDeveloper
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andykaylor,
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xlauko
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@llvm/pr-subscribers-clang Author: Amr Hesham (AmrDeveloper) ChangesUpstream the support for CXXNoexceptExpr Full diff: https://github.com/llvm/llvm-project/pull/171462.diff 2 Files Affected:
diff --git a/clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp b/clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
index 9043ecab42f15..3b61c25b597c3 100644
--- a/clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
+++ b/clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
@@ -751,6 +751,10 @@ class ScalarExprEmitter : public StmtVisitor<ScalarExprEmitter, mlir::Value> {
return {};
}
+ mlir::Value VisitCXXNoexceptExpr(CXXNoexceptExpr *e) {
+ return builder.getBool(e->getValue(), cgf.getLoc(e->getExprLoc()));
+ }
+
/// Emit a conversion from the specified type to the specified destination
/// type, both of which are CIR scalar types.
/// TODO: do we need ScalarConversionOpts here? Should be done in another
diff --git a/clang/test/CIR/CodeGen/noexcept.cpp b/clang/test/CIR/CodeGen/noexcept.cpp
new file mode 100644
index 0000000000000..9336b8181f869
--- /dev/null
+++ b/clang/test/CIR/CodeGen/noexcept.cpp
@@ -0,0 +1,40 @@
+// RUN: %clang_cc1 -std=c++20 -triple x86_64-unknown-linux-gnu -Wno-unused-value -fclangir -emit-cir %s -o %t.cir
+// RUN: FileCheck --input-file=%t.cir %s -check-prefix=CIR
+// RUN: %clang_cc1 -std=c++20 -triple x86_64-unknown-linux-gnu -Wno-unused-value -fclangir -emit-llvm %s -o %t-cir.ll
+// RUN: FileCheck --input-file=%t-cir.ll %s -check-prefix=LLVM
+// RUN: %clang_cc1 -std=c++20 -triple x86_64-unknown-linux-gnu -Wno-unused-value -emit-llvm %s -o %t.ll
+// RUN: FileCheck --input-file=%t.ll %s -check-prefix=OGCG
+
+void function_may_throw();
+
+void function_no_except() noexcept;
+
+void no_except() {
+ bool a = noexcept(1);
+ bool b = noexcept(function_may_throw());
+ bool c = noexcept(function_no_except());
+}
+
+// CIR: %[[A_ADDR:.*]] = cir.alloca !cir.bool, !cir.ptr<!cir.bool>, ["a", init]
+// CIR: %[[B_ADDR:.*]] = cir.alloca !cir.bool, !cir.ptr<!cir.bool>, ["b", init]
+// CIR: %[[C_ADDR:.*]] = cir.alloca !cir.bool, !cir.ptr<!cir.bool>, ["c", init]
+// CIR: %[[CONST_TRUE:.*]] = cir.const #true
+// CIR: cir.store {{.*}} %[[CONST_TRUE]], %[[A_ADDR]] : !cir.bool, !cir.ptr<!cir.bool>
+// CIR: %[[CONST_FALSE:.*]] = cir.const #false
+// CIR: cir.store {{.*}} %[[CONST_FALSE]], %[[B_ADDR]] : !cir.bool, !cir.ptr<!cir.bool>
+// CIR: %[[CONST_TRUE:.*]] = cir.const #true
+// CIR: cir.store {{.*}} %[[CONST_TRUE]], %[[C_ADDR]] : !cir.bool, !cir.ptr<!cir.bool>
+
+// LLVM: %[[A_ADDR:.*]] = alloca i8, i64 1, align 1
+// LLVM: %[[B_ADDR:.*]] = alloca i8, i64 1, align 1
+// LLVM: %[[C_ADDR:.*]] = alloca i8, i64 1, align 1
+// LLVM: store i8 1, ptr %[[A_ADDR]], align 1
+// LLVM: store i8 0, ptr %[[B_ADDR]], align 1
+// LLVM: store i8 1, ptr %[[C_ADDR]], align 1
+
+// OGCG: %[[A_ADDR:.*]] = alloca i8, align 1
+// OGCG: %[[B_ADDR:.*]] = alloca i8, align 1
+// OGCG: %[[C_ADDR:.*]] = alloca i8, align 1
+// OGCG: store i8 1, ptr %[[A_ADDR]], align 1
+// OGCG: store i8 0, ptr %[[B_ADDR]], align 1
+// OGCG: store i8 1, ptr %[[C_ADDR]], align 1
|
Member
|
@llvm/pr-subscribers-clangir Author: Amr Hesham (AmrDeveloper) ChangesUpstream the support for CXXNoexceptExpr Full diff: https://github.com/llvm/llvm-project/pull/171462.diff 2 Files Affected:
diff --git a/clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp b/clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
index 9043ecab42f15..3b61c25b597c3 100644
--- a/clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
+++ b/clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
@@ -751,6 +751,10 @@ class ScalarExprEmitter : public StmtVisitor<ScalarExprEmitter, mlir::Value> {
return {};
}
+ mlir::Value VisitCXXNoexceptExpr(CXXNoexceptExpr *e) {
+ return builder.getBool(e->getValue(), cgf.getLoc(e->getExprLoc()));
+ }
+
/// Emit a conversion from the specified type to the specified destination
/// type, both of which are CIR scalar types.
/// TODO: do we need ScalarConversionOpts here? Should be done in another
diff --git a/clang/test/CIR/CodeGen/noexcept.cpp b/clang/test/CIR/CodeGen/noexcept.cpp
new file mode 100644
index 0000000000000..9336b8181f869
--- /dev/null
+++ b/clang/test/CIR/CodeGen/noexcept.cpp
@@ -0,0 +1,40 @@
+// RUN: %clang_cc1 -std=c++20 -triple x86_64-unknown-linux-gnu -Wno-unused-value -fclangir -emit-cir %s -o %t.cir
+// RUN: FileCheck --input-file=%t.cir %s -check-prefix=CIR
+// RUN: %clang_cc1 -std=c++20 -triple x86_64-unknown-linux-gnu -Wno-unused-value -fclangir -emit-llvm %s -o %t-cir.ll
+// RUN: FileCheck --input-file=%t-cir.ll %s -check-prefix=LLVM
+// RUN: %clang_cc1 -std=c++20 -triple x86_64-unknown-linux-gnu -Wno-unused-value -emit-llvm %s -o %t.ll
+// RUN: FileCheck --input-file=%t.ll %s -check-prefix=OGCG
+
+void function_may_throw();
+
+void function_no_except() noexcept;
+
+void no_except() {
+ bool a = noexcept(1);
+ bool b = noexcept(function_may_throw());
+ bool c = noexcept(function_no_except());
+}
+
+// CIR: %[[A_ADDR:.*]] = cir.alloca !cir.bool, !cir.ptr<!cir.bool>, ["a", init]
+// CIR: %[[B_ADDR:.*]] = cir.alloca !cir.bool, !cir.ptr<!cir.bool>, ["b", init]
+// CIR: %[[C_ADDR:.*]] = cir.alloca !cir.bool, !cir.ptr<!cir.bool>, ["c", init]
+// CIR: %[[CONST_TRUE:.*]] = cir.const #true
+// CIR: cir.store {{.*}} %[[CONST_TRUE]], %[[A_ADDR]] : !cir.bool, !cir.ptr<!cir.bool>
+// CIR: %[[CONST_FALSE:.*]] = cir.const #false
+// CIR: cir.store {{.*}} %[[CONST_FALSE]], %[[B_ADDR]] : !cir.bool, !cir.ptr<!cir.bool>
+// CIR: %[[CONST_TRUE:.*]] = cir.const #true
+// CIR: cir.store {{.*}} %[[CONST_TRUE]], %[[C_ADDR]] : !cir.bool, !cir.ptr<!cir.bool>
+
+// LLVM: %[[A_ADDR:.*]] = alloca i8, i64 1, align 1
+// LLVM: %[[B_ADDR:.*]] = alloca i8, i64 1, align 1
+// LLVM: %[[C_ADDR:.*]] = alloca i8, i64 1, align 1
+// LLVM: store i8 1, ptr %[[A_ADDR]], align 1
+// LLVM: store i8 0, ptr %[[B_ADDR]], align 1
+// LLVM: store i8 1, ptr %[[C_ADDR]], align 1
+
+// OGCG: %[[A_ADDR:.*]] = alloca i8, align 1
+// OGCG: %[[B_ADDR:.*]] = alloca i8, align 1
+// OGCG: %[[C_ADDR:.*]] = alloca i8, align 1
+// OGCG: store i8 1, ptr %[[A_ADDR]], align 1
+// OGCG: store i8 0, ptr %[[B_ADDR]], align 1
+// OGCG: store i8 1, ptr %[[C_ADDR]], align 1
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Upstream the support for CXXNoexceptExpr