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[MachineSink][RISCV] Only call isConstantPhysReg or isIgnorableUse for uses. #99363

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Merged
merged 2 commits into from
Jul 17, 2024
Merged

[MachineSink][RISCV] Only call isConstantPhysReg or isIgnorableUse for uses. #99363

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e74b3dc
[MachineSink] Only call isConstantPhysReg or isIgnorableUse for uses.
topperc Jul 17, 2024
70a85e8
fixup! Add -o - to test.
topperc Jul 17, 2024
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2 changes: 1 addition & 1 deletion llvm/lib/CodeGen/MachineSink.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -417,7 +417,7 @@ bool MachineSinking::PerformSinkAndFold(MachineInstr &MI,
continue;
}

if (Reg.isPhysical() &&
if (Reg.isPhysical() && MO.isUse() &&
(MRI->isConstantPhysReg(Reg) || TII->isIgnorableUse(MO)))
continue;

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39 changes: 39 additions & 0 deletions llvm/test/CodeGen/RISCV/sink-and-fold-crash.mir
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@@ -0,0 +1,39 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
# RUN: llc %s -mtriple=riscv64 -run-pass=machine-sink -o - | FileCheck %s

---
name: main
tracksRegLiveness: true
registers:
- { id: 0, class: fpr32 }
- { id: 1, class: fpr32 }
- { id: 2, class: gpr }
- { id: 3, class: gpr }
liveins:
- { reg: '$f10_f', virtual-reg: '%0' }
- { reg: '$f11_f', virtual-reg: '%1' }
body: |
bb.0.entry:
liveins: $f10_f, $f11_f

; CHECK-LABEL: name: main
; CHECK: liveins: $f10_f, $f11_f
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr32 = COPY $f11_f
; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr32 = COPY $f10_f
; CHECK-NEXT: [[ReadFFLAGS:%[0-9]+]]:gpr = ReadFFLAGS implicit $fflags
; CHECK-NEXT: [[FLE_S:%[0-9]+]]:gpr = nofpexcept FLE_S [[COPY1]], [[COPY]]
; CHECK-NEXT: WriteFFLAGS killed [[ReadFFLAGS]], implicit-def $fflags
; CHECK-NEXT: $x0 = nofpexcept FEQ_S [[COPY1]], [[COPY]]
; CHECK-NEXT: $x10 = COPY [[FLE_S]]
; CHECK-NEXT: PseudoRET implicit $x10
%1:fpr32 = COPY $f11_f
%0:fpr32 = COPY $f10_f
%3:gpr = ReadFFLAGS implicit $fflags
%2:gpr = nofpexcept FLE_S %0, %1
WriteFFLAGS killed %3, implicit-def $fflags
$x0 = nofpexcept FEQ_S %0, %1
$x10 = COPY %2
PseudoRET implicit $x10

...