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This is a bugfix for target mode address masking.

Previously, the OT I2C's bus address would be used for the address byte on a start condition. Now that address masking is implemented, the address that matched may not be exactly the bus address (as some bits are ignored). Hardware presents the matched address in the start condition byte so that software can perform different actions based on different target transaction addresses.

@ziuziakowska ziuziakowska force-pushed the ot_i2c_address_masking_fix branch from 3d13665 to ed65676 Compare October 10, 2025 15:03
@ziuziakowska ziuziakowska force-pushed the ot_i2c_address_masking_fix branch from ed65676 to 803fa9d Compare October 13, 2025 09:57
This is a bugfix for target mode address masking.

Previously, the OT I2C's bus address would be used for the address byte
on a start condition. Now that address masking is implemented, the
address that matched may not be exactly the bus address (as some bits
are ignored). Hardware presents the matched address in the start
condition byte so that software can perform different actions based on
different target transaction addresses.

Signed-off-by: Alice Ziuziakowska <a.ziuziakowska@lowrisc.org>
@ziuziakowska ziuziakowska force-pushed the ot_i2c_address_masking_fix branch from 803fa9d to 0fbd27a Compare October 13, 2025 10:22
@AlexJones0 AlexJones0 merged commit 49896ee into lowRISC:ot-9.2.0 Oct 14, 2025
9 checks passed
@ziuziakowska ziuziakowska deleted the ot_i2c_address_masking_fix branch October 14, 2025 10:11
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4 participants