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ot_pwgmr: add initial support for CDC and upgrade support for multitop
#242
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ot_pwgmr: add initial support for CDC and upgrade support for multitop
#242
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(splitted single commit into commits with distinct features) |
Also split up ot_aon_timer_get_wdog_count Signed-off-by: Emmanuel Blot <eblot@rivosinc.com>
Fix constant definitions and bitfields that were still hardcoded for a specific top (likely EarlGrey) Replace some constants with top-dependent macros Defer creation of reset request lines to the realize function, as the number of reset active lines are not know before this execution point. Signed-off-by: Emmanuel Blot <eblot@rivosinc.com>
…ain crossing Several register properties are not used as-is, as they drive features implemented in the slow clock domain, while the registers themselves are in the default, "fast" clock domain. It is required for the guest SW to write and poll the CFG_CDC_SYNC register to commit new settings to the slow clock domain. QEMU was not supporting this feature, the guest SW could then miss to synchronize these features. Application would have run fine on QEMU but not on the real HW. Note that the doc is out-of-date, and only the RTL can provide a list of the actual slow clock domain features gated by the CFG_CDC_DOMAIN. Also update the guest error message to give a hint when reset cannot be successfully enabled in this case. Signed-off-by: Emmanuel Blot <eblot@rivosinc.com>
Signed-off-by: Emmanuel Blot <eblot@rivosinc.com>
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LGTM, thanks.
Note that the doc is out-of-date, and only the RTL can provide a list of the actual
slow clock domain features gated by the CFG_CDC_DOMAIN.
Is this an OT doc deficiency? Do you know if it is documented in an issue upstream anywhere?
May be not a true deficiency, but rather a lack of details. To be honest, I stopped tracking all the discrepencies between the OT doc and the actual RTL, there are far too many and often very subtle, such as this one, so ... documenting them through tickets take too much time unfortunately. I wrote a couple of them. BTW if the CSS issues could be addressed, that would be very nice, as tweaking the CSS in the browser to get access to the content is not very convenient. I think the real issue is that
Sorry, I have not checked. |
several register properties are not used as-is, as they drive features implemented in the slow clock domain, while the registers themselves are in the default, "fast" clock domain. It is required for the guest SW to write and poll the CFG_CDC_SYNC register to commit new settings to the slow clock domain. QEMU was not supporting this feature, the
guest SW could then miss to synchronize these features. Application was running fine on QEMU but not on the real HW. Note that the doc is out-of-date, and only the RTL can provide a list of the actual slow clock domain features gated by the CFG_CDC_DOMAIN. Update the guest error message to give a hint when reset cannot be successfully enabled
in this case.