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@engdoreis engdoreis commented Nov 10, 2025

Implement the hw handled registers
To test use the Opentitan PR lowRISC/opentitan#28697 and run:

bazel test --test_output=streamed --build_tests_only \
    $(bazel query //sw/device/tests:all | grep qemu | grep spi_device) \
    --test_tag_filters="qemu" --override_repository="+qemu+qemu_opentitan=$qemu_repo"

Fix: lowRISC/opentitan#27930

Comment on lines +450 to +452
unsigned addr;
uint32_t offset;
unsigned nbytes;

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Any particular reason for the mix of uint32_t and unsigned?

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@engdoreis engdoreis Nov 10, 2025

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Following Emmanuel's advise.

@AlexJones0 AlexJones0 changed the title [ot] hw/opentitan: spi_device: implement hw registers for tpm mode ot_spi_device: Implement hw registers for tpm mode Nov 10, 2025
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Thanks, this LGTM.

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@ziuziakowska ziuziakowska left a comment

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LGTM, just some minor nits.

@engdoreis engdoreis force-pushed the ot_spi_tpm branch 2 times, most recently from a9f3886 to 8e1785a Compare November 11, 2025 18:14
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nit: may be capitalize HW & TPM in PR title?

@engdoreis engdoreis changed the title ot_spi_device: Implement hw registers for tpm mode ot_spi_device: Implement HW registers for TPM mode Nov 12, 2025
Signed-off-by: Douglas Reis <doreis@lowrisc.org>
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engdoreis commented Nov 13, 2025

The CI failures are related to USB, so I'll merge this PR.

@engdoreis engdoreis merged commit ce6744e into lowRISC:ot-9.2.0 Nov 13, 2025
8 of 10 checks passed
@engdoreis engdoreis deleted the ot_spi_tpm branch November 13, 2025 15:35
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[qemu] Earlgrey 1.0.0 spi_device TPM support

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