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@AlexJones0 AlexJones0 commented Nov 11, 2025

See the comment in the commit. It turns out that initialization is even more of a special-case than previously realized in the flash controller.

This is needed to get some SRAM execution flows working (which read from flash with the flash_ctrl uninitialized, see sram_start.S and ast_program.c in OpenTitan). Examples are e.g. the //sw/device/tests:rv_core_ibex_isa_test_{} or //sw/device/tests:rv_core_ibex_epmp_test_{} in upstream OpenTitan.

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@ziuziakowska ziuziakowska left a comment

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LGTM 👍

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LGTM

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AlexJones0 commented Nov 12, 2025

From further testing this appears to actually be the case for all the flash operations, not just reading. I've tried looking through the RTL and can't see any links that would disable flash PHY programming/erasing when the flash protocol controller is not initialized, and tests seem to rely on being able to program without initializing in some cases. Updated to use this (simpler) behaviour now.

Turns out the flash controller initialization is even more of a special
case then thought. The physical flash macro needs to be initialized, but
this is vendor-specific and not useful to emulate so we always just say
the flash PHY is initialized. The HW should specifically allow
operations on uninitialized flash, but reads specifically are handled
somewhat differently. This is explained in more detail in the comment
in this commit.

Signed-off-by: Alex Jones <alex.jones@lowrisc.org>
@AlexJones0 AlexJones0 merged commit 2006c92 into lowRISC:ot-9.2.0 Nov 13, 2025
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4 participants