Spi work (Note: 1 invasive fix)

HW/cv-ip/hm2reg_io/hm2reg_io_hw.tcl

@@ -1,11 +1,11 @@
 # TCL File Generated by Component Editor 15.1
-# Mon May 16 17:56:54 CEST 2016
+# Mon May 27 16:40:18 CEST 2019
 # DO NOT MODIFY
 
 
 # 
-# hm2reg_io "hm2reg-io" v1.0
-# Michael Brown 2016.05.16.17:56:54
+# hm2reg_io "generic-uio,ui_pdrv" v1.0
+# Michael Brown 2019.05.27.16:40:18
 # hostmot2 interface for mesa hdl source
 # 
 
@@ -26,7 +26,7 @@ set_module_property OPAQUE_ADDRESS_MAP true
 set_module_property GROUP Interfaces
 set_module_property AUTHOR "Michael Brown"
 set_module_property ICON_PATH machinekiticon.png
-set_module_property DISPLAY_NAME "generic-uio,ui_pdrv"
+set_module_property DISPLAY_NAME generic-uio,ui_pdrv
 set_module_property INSTANTIATE_IN_SYSTEM_MODULE true
 set_module_property EDITABLE true
 set_module_property REPORT_TO_TALKBACK false
@@ -144,8 +144,7 @@ set_interface_property slave readWaitStates 2
 set_interface_property slave readWaitTime 2
 set_interface_property slave setupTime 2
 set_interface_property slave timingUnits Cycles
-set_interface_property slave writeWaitStates 2
-set_interface_property slave writeWaitTime 2
+set_interface_property slave writeWaitTime 0
 set_interface_property slave ENABLED true
 set_interface_property slave EXPORT_OF ""
 set_interface_property slave PORT_NAME_MAP ""

HW/cv-megawizard/lpm-ip/lpm_mux16.cmp

@@ -1,15 +1,15 @@
---Copyright (C) 2017  Intel Corporation. All rights reserved.
---Your use of Intel Corporation's design tools, logic functions 
+--Copyright (C) 1991-2016 Altera Corporation. All rights reserved.
+--Your use of Altera Corporation's design tools, logic functions 
 --and other software and tools, and its AMPP partner logic 
 --functions, and any output files from any of the foregoing 
 --(including device programming or simulation files), and any 
 --associated documentation or information are expressly subject 
---to the terms and conditions of the Intel Program License 
---Subscription Agreement, the Intel Quartus Prime License Agreement,
---the Intel MegaCore Function License Agreement, or other 
+--to the terms and conditions of the Altera Program License 
+--Subscription Agreement, the Altera Quartus Prime License Agreement,
+--the Altera MegaCore Function License Agreement, or other 
 --applicable license agreement, including, without limitation, 
 --that your use is for the sole purpose of programming logic 
---devices manufactured by Intel and sold by Intel or its 
+--devices manufactured by Altera and sold by Altera or its 
 --authorized distributors.  Please refer to the applicable 
 --agreement for further details.
 

HW/cv-megawizard/lpm-ip/lpm_mux16.qip

@@ -1,5 +1,5 @@
 set_global_assignment -name IP_TOOL_NAME "LPM_MUX"
-set_global_assignment -name IP_TOOL_VERSION "16.1"
+set_global_assignment -name IP_TOOL_VERSION "15.1"
 set_global_assignment -name IP_GENERATED_DEVICE_FAMILY "{Cyclone V}"
 set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) "lpm_mux16.vhd"]
 set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "lpm_mux16.cmp"]

HW/cv-megawizard/lpm-ip/lpm_mux16.vhd

@@ -14,22 +14,22 @@
 -- ************************************************************
 -- THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
 --
--- 16.1.2 Build 203 01/18/2017 SJ Standard Edition
+-- 15.1.2 Build 193 02/01/2016 SJ Standard Edition
 -- ************************************************************
 
 
---Copyright (C) 2017  Intel Corporation. All rights reserved.
---Your use of Intel Corporation's design tools, logic functions 
+--Copyright (C) 1991-2016 Altera Corporation. All rights reserved.
+--Your use of Altera Corporation's design tools, logic functions 
 --and other software and tools, and its AMPP partner logic 
 --functions, and any output files from any of the foregoing 
 --(including device programming or simulation files), and any 
 --associated documentation or information are expressly subject 
---to the terms and conditions of the Intel Program License 
---Subscription Agreement, the Intel Quartus Prime License Agreement,
---the Intel MegaCore Function License Agreement, or other 
+--to the terms and conditions of the Altera Program License 
+--Subscription Agreement, the Altera Quartus Prime License Agreement,
+--the Altera MegaCore Function License Agreement, or other 
 --applicable license agreement, including, without limitation, 
 --that your use is for the sole purpose of programming logic 
---devices manufactured by Intel and sold by Intel or its 
+--devices manufactured by Altera and sold by Altera or its 
 --authorized distributors.  Please refer to the applicable 
 --agreement for further details.
 

HW/cv-megawizard/lpm-ip/lpm_shiftreg16.cmp

@@ -1,15 +1,15 @@
---Copyright (C) 2017  Intel Corporation. All rights reserved.
---Your use of Intel Corporation's design tools, logic functions 
+--Copyright (C) 1991-2016 Altera Corporation. All rights reserved.
+--Your use of Altera Corporation's design tools, logic functions 
 --and other software and tools, and its AMPP partner logic 
 --functions, and any output files from any of the foregoing 
 --(including device programming or simulation files), and any 
 --associated documentation or information are expressly subject 
---to the terms and conditions of the Intel Program License 
---Subscription Agreement, the Intel Quartus Prime License Agreement,
---the Intel MegaCore Function License Agreement, or other 
+--to the terms and conditions of the Altera Program License 
+--Subscription Agreement, the Altera Quartus Prime License Agreement,
+--the Altera MegaCore Function License Agreement, or other 
 --applicable license agreement, including, without limitation, 
 --that your use is for the sole purpose of programming logic 
---devices manufactured by Intel and sold by Intel or its 
+--devices manufactured by Altera and sold by Altera or its 
 --authorized distributors.  Please refer to the applicable 
 --agreement for further details.
 

HW/cv-megawizard/lpm-ip/lpm_shiftreg16.qip

@@ -1,5 +1,5 @@
 set_global_assignment -name IP_TOOL_NAME "LPM_SHIFTREG"
-set_global_assignment -name IP_TOOL_VERSION "16.1"
+set_global_assignment -name IP_TOOL_VERSION "15.1"
 set_global_assignment -name IP_GENERATED_DEVICE_FAMILY "{Cyclone V}"
 set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) "lpm_shiftreg16.vhd"]
 set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "lpm_shiftreg16_inst.vhd"]

HW/cv-megawizard/lpm-ip/lpm_shiftreg16.vhd

@@ -14,22 +14,22 @@
 -- ************************************************************
 -- THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
 --
--- 16.1.2 Build 203 01/18/2017 SJ Standard Edition
+-- 15.1.2 Build 193 02/01/2016 SJ Standard Edition
 -- ************************************************************
 
 
---Copyright (C) 2017  Intel Corporation. All rights reserved.
---Your use of Intel Corporation's design tools, logic functions 
+--Copyright (C) 1991-2016 Altera Corporation. All rights reserved.
+--Your use of Altera Corporation's design tools, logic functions 
 --and other software and tools, and its AMPP partner logic 
 --functions, and any output files from any of the foregoing 
 --(including device programming or simulation files), and any 
 --associated documentation or information are expressly subject 
---to the terms and conditions of the Intel Program License 
---Subscription Agreement, the Intel Quartus Prime License Agreement,
---the Intel MegaCore Function License Agreement, or other 
+--to the terms and conditions of the Altera Program License 
+--Subscription Agreement, the Altera Quartus Prime License Agreement,
+--the Altera MegaCore Function License Agreement, or other 
 --applicable license agreement, including, without limitation, 
 --that your use is for the sole purpose of programming logic 
---devices manufactured by Intel and sold by Intel or its 
+--devices manufactured by Altera and sold by Altera or its 
 --authorized distributors.  Please refer to the applicable 
 --agreement for further details.