Tiger Game.com's SM8521 clock speed is incorrect, instructions have wrong cycle counts too

[simontime]

MAME currently assumes the clock speed to be 5.5296MHz, however, the actual clock speed appears to be 4.9152MHz precisely, according to various bits of code from the official Game.com SDK floating around the web.

See the speech playback functions, as well as delay20ms (listed below) and Delay200ms which expect a precise number of cycles (and are helpfully commented with the cycle count) to delay for those lengths.

delay20ms:  global  delay20ms
            movw    rr0,#01800h             ;6
d20ms_loop:
            decw    rr0                     ;8
            br      nz,d20ms_loop          ;8

            ret

If the cycle counts written by Tiger are correct—which I assume they are, since Tiger would've been in contact with Sharp who gave them accurate info—then certain instructions implemented in MAME also have an incorrect cycle count too.

Accounting for only the looped segment in this delay function, ((8+8)*0x1800)*50 = precisely 4915200.

[Robbbert]

The problem is that the speech is already too slow. We are already using the cycle counts you have listed there. If we changed the crystal from 11059200 to 9830400 as you suggest, the speech would be even worse. You'll have to come up with better information, preferably official info from Sharp as to the cycle counts.

[simontime]

Yeah, the speech speed is quite a big issue, as well as the inaccurate timer interrupts which cause the countdown timer to go far too quickly in various games.

I'm honestly unsure of the best way to tackle this, since as you said, changing the clock speed at this stage would exacerbate the speech issue and the interrupts would still be out of time...

[ajrhacker]

Maybe the cycle counts are leaving out the 2 cycles needed for instruction prefetch. Normally that can be overlapped with execution, as is documented for the SM8521, but after a true branch is usually an exception to that kind of rule.

[simontime]

After extensive research, I can confirm the clock speed and cycle counts on real hardware align with MAME's.
Huge apologies for the confusion and inconvenience.
There are interrupt timing issues, but I feel it would be wiser to create a separate issue for that, rather than continue this one with an incorrect title.