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xcarus-binutils-gdb
xcarus-binutils-gdb PublicForked from StMiky/xcarus-binutils-gdb
GNU RISC-V binutils and GDB with support for NM-Carus custom vector instructions
C
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riscv-gnu-toolchain
riscv-gnu-toolchain PublicForked from StMiky/riscv-gnu-toolchain
GNU toolchain for RISC-V, including GCC
C
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len5-core
len5-core PublicForked from esl-epfl/len5-core
LEN5 is a configurable, speculative, out-of-order, 64-bit RISC-V microprocessor targetting etherogeneus systems on chip.
SystemVerilog
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