Nuvoton: M487: Fix RTC spare registers cleared with WDT reset from PD

[ccli8]

Summary of changes

WDT reset from PD needs workaround in which DPD wake-up reset is set up to run immediately, but it will clear RTC spare registers per test. The solution is to use SPD wake-up reset instead.

NOTE1: This workaround is applied only when H/W reset flag is raised. This is to avoid abnormal boot sequence for bootloader-enabled application.

NOTE2: This workaround will change SYS.RSTSTS and influence RESET_REASON. To avoid confusion, RESET_REASON is disabled by default.

Impact of changes

RESET_REASON gets to disable by default. And it shouldn't use with MBED_CONF_TARGET_WDT_RESET_WORKAROUND together.

---

Pull request type

[x] Patch update (Bug fix / Target update / Docs update / Test update / Refactor)
[] Feature update (New feature / Functionality change / New API)
[] Major update (Breaking change E.g. Return code change / API behaviour change)

---

[multiplemonomials]

Am I correct in my understanding that:

• There is a HW issue where, when we encounter a watchdog reset while in power-down mode, bad stuff happens
• Fixing this bad stuff requires basically resetting the chip a second time using SPD mode?
• There is no easy way to detect when we have run into a watchdog reset while in power-down mode, so to be defensive about it, we basically always reboot the chip via SPD after it boots up the first time?

[ccli8]

Yes, your understanding is correct. For RESET_REASON, actually, there is RTC spare registers which can save SYS->RSTSTS across reset boundary except DPD. However, I prefer not to add more logic for RESET_REASON. The situation gets more complicated when bootloader enabled application is taken into consideration. It makes things more clear to not support RESET_REASON when this workaround is applied.

[multiplemonomials]

OK that makes sense, I suppose that if a user really needs RESET_REASON they can see this in the target JSON and enable it if they don't use the watchdog.