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Merged
pull merged 5 commits into from
Apr 3, 2023
Merged

[pull] master from RT-Thread:master #254

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ce346d7
modify the sampling rate to increase the actual baud rate(drv_usart.c…
Eziotao-tyd Apr 3, 2023
dd17ca0
[bsp] fix mismatched function types in rt_pin_ops (#7161)
XLOverflow Apr 3, 2023
3a9c569
[AT] Add null pointer check in at_client_get (#7154)
dingiso Apr 3, 2023
e49140b
[HUST CSE IoTS&P Lab][bsp] add missing UL suffix to BIT macro to prev…
shandianchengzi Apr 3, 2023
69e5b10
[at_socket.c] Fix null pointer vulnerability caused by the variable a…
Apr 3, 2023
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130 changes: 65 additions & 65 deletions bsp/CME_M7/StdPeriph_Driver/inc/cmem7_usb.h
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@@ -1,28 +1,28 @@
/**
*****************************************************************************
* @file cmem7_usb.h
*
* @brief CMEM7 USB header file
*
*
* @version V1.0
* @date 3. September 2013
*
* @note
*
*****************************************************************************
* @attention
*
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
* TIME. AS A RESULT, CAPITAL-MICRO SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*
* <h2><center>&copy; COPYRIGHT 2013 Capital-micro </center></h2>
*****************************************************************************
*/
*****************************************************************************
* @file cmem7_usb.h
*
* @brief CMEM7 USB header file
*
*
* @version V1.0
* @date 3. September 2013
*
* @note
*
*****************************************************************************
* @attention
*
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
* TIME. AS A RESULT, CAPITAL-MICRO SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*
* <h2><center>&copy; COPYRIGHT 2013 Capital-micro </center></h2>
*****************************************************************************
*/

#ifndef __CMEM7_USB_H
#define __CMEM7_USB_H
Expand All @@ -38,19 +38,19 @@
/**
*
*/
#define SET_HCDMA_DESC_ADDR(a) (((uint32_t)(a)) >> 9)
#define MIN(a, b) (((a) <= (b)) ? (a) : (b))
#define MAX(a, b) (((a) >= (b)) ? (a) : (b))
#define BIT(b) (0x1u << (b))
#define SET_HCDMA_DESC_ADDR(a) (((uint32_t)(a)) >> 9)
#define MIN(a, b) (((a) <= (b)) ? (a) : (b))
#define MAX(a, b) (((a) >= (b)) ? (a) : (b))
#define BIT(b) (0x1U << (b))

/** @defgroup USB_HOST_PID
* @{
*/
#define USB_HOST_PID_DATA0 0x0 /*!< Indicates the Data PID is DATA0 */
#define USB_HOST_PID_DATA2 0x1 /*!< Indicates the Data PID is DATA2 */
#define USB_HOST_PID_DATA1 0x2 /*!< Indicates the Data PID is DATA1 */
#define USB_HOST_PID_MDATA 0x3 /*!< Indicates the Data PID is MDATA (non-control) */
#define USB_HOST_PID_SETUP 0x3 /*!< Indicates the Data PID is SETUP (control) */
#define USB_HOST_PID_DATA0 0x0 /*!< Indicates the Data PID is DATA0 */
#define USB_HOST_PID_DATA2 0x1 /*!< Indicates the Data PID is DATA2 */
#define USB_HOST_PID_DATA1 0x2 /*!< Indicates the Data PID is DATA1 */
#define USB_HOST_PID_MDATA 0x3 /*!< Indicates the Data PID is MDATA (non-control) */
#define USB_HOST_PID_SETUP 0x3 /*!< Indicates the Data PID is SETUP (control) */
/**
* @}
*/
Expand All @@ -59,10 +59,10 @@
* @{
*/
typedef enum {
USB_EP_TYPE_CONTROL = 0x0, /*!< Control */
USB_EP_TYPE_ISO = 0x1, /*!< Isochronous */
USB_EP_TYPE_BULK = 0x2, /*!< Bulk */
USB_EP_TYPE_INT = 0x3, /*!< Interrupt */
USB_EP_TYPE_CONTROL = 0x0, /*!< Control */
USB_EP_TYPE_ISO = 0x1, /*!< Isochronous */
USB_EP_TYPE_BULK = 0x2, /*!< Bulk */
USB_EP_TYPE_INT = 0x3, /*!< Interrupt */
} USB_EP_TYPE;
/**
* @}
Expand All @@ -72,10 +72,10 @@ typedef enum {
* @{
*/
typedef enum {
USB_ENUM_SPEED_HS = 0x0, /*!< Enumerated Speed is High Speed */
USB_ENUM_SPEED_FS = 0x1, /*!< Enumerated Speed is Full Speed */
USB_ENUM_SPEED_LS = 0x2, /*!< Enumerated Speed is Low Speed */
USB_ENUM_SPEED_FS_48M = 0x3, /*!< Enumerated Speed is Full Speed (PHY clock is running at 48MHz) */
USB_ENUM_SPEED_HS = 0x0, /*!< Enumerated Speed is High Speed */
USB_ENUM_SPEED_FS = 0x1, /*!< Enumerated Speed is Full Speed */
USB_ENUM_SPEED_LS = 0x2, /*!< Enumerated Speed is Low Speed */
USB_ENUM_SPEED_FS_48M = 0x3, /*!< Enumerated Speed is Full Speed (PHY clock is running at 48MHz) */
} USB_ENUM_SPEED;
/**
* @}
Expand All @@ -85,15 +85,15 @@ typedef enum {
* @{
*/
typedef enum {
USB_INT_GP_HOST_DISC, /*!< Device disconnection interrupt (Only for HOST Mode) */
USB_INT_GP_DEV_RESET, /*!< USB Port Reset Interrupt (Only for DEVICE Mode) */
USB_INT_GP_DEV_ENUMDONE, /*!< Enumeration Done Interrupt (Only for DEVICE Mode) */
USB_INT_GP_DEV_SUSP, /*!< USB Suspend Interrupt (Only for DEVICE Mode) */
USB_INT_GP_DEV_EARLY, /*!< USB Idle Interrupt (Only for DEVICE Mode) */
USB_INT_GP_SOF, /*!< SOF Interrupt */
USB_INT_GP_MIS, /*!< USB access overstep the boundary Interrupt */
USB_INT_GP_IDCHG, /*!< OTG Connector ID Status Change Interrupt */
USB_INT_GP_SESSREQ, /*!< Session Request / Create Interrupt */
USB_INT_GP_HOST_DISC, /*!< Device disconnection interrupt (Only for HOST Mode) */
USB_INT_GP_DEV_RESET, /*!< USB Port Reset Interrupt (Only for DEVICE Mode) */
USB_INT_GP_DEV_ENUMDONE, /*!< Enumeration Done Interrupt (Only for DEVICE Mode) */
USB_INT_GP_DEV_SUSP, /*!< USB Suspend Interrupt (Only for DEVICE Mode) */
USB_INT_GP_DEV_EARLY, /*!< USB Idle Interrupt (Only for DEVICE Mode) */
USB_INT_GP_SOF, /*!< SOF Interrupt */
USB_INT_GP_MIS, /*!< USB access overstep the boundary Interrupt */
USB_INT_GP_IDCHG, /*!< OTG Connector ID Status Change Interrupt */
USB_INT_GP_SESSREQ, /*!< Session Request / Create Interrupt */
} USB_INT_GP;
/**
* @}
Expand All @@ -103,11 +103,11 @@ typedef enum {
* @{
*/
typedef enum {
USB_INT_OTG_SESEND, /*!< Session End Interrupt */
USB_INT_OTG_STANDAUP, /*!< B Device timeout to connect Interrupt */
USB_INT_OTG_HNDETECT, /*!< Host Negotiation Detected Interrupt */
USB_INT_OTG_HNSUCCHG, /*!< Host Negotiation Success Status Change Interrupt */
USB_INT_OTG_KEEPAPP, /*!< Debounce Done Interrupt (Only for HOST Mode) */
USB_INT_OTG_SESEND, /*!< Session End Interrupt */
USB_INT_OTG_STANDAUP, /*!< B Device timeout to connect Interrupt */
USB_INT_OTG_HNDETECT, /*!< Host Negotiation Detected Interrupt */
USB_INT_OTG_HNSUCCHG, /*!< Host Negotiation Success Status Change Interrupt */
USB_INT_OTG_KEEPAPP, /*!< Debounce Done Interrupt (Only for HOST Mode) */
} USB_INT_OTG;
/**
* @}
Expand All @@ -117,10 +117,10 @@ typedef enum {
* @{
*/
typedef enum {
USB_OTG_DEV_HNSUCC = 8, /*!< Host Negotiation Success (Only for DEVICE Mode, Read Only) */
USB_OTG_DEV_HNPREQ = 9, /*!< HNP Request (Only for DEVICE Mode) */
USB_OTG_HST_HNPENABLE = 10, /*!< Host Set HNP Enable (Only for HOST Mode) */
USB_OTG_DEV_HNPENABLE = 11, /*!< Device HNP Enabled (Only for DEVICE Mode) */
USB_OTG_DEV_HNSUCC = 8, /*!< Host Negotiation Success (Only for DEVICE Mode, Read Only) */
USB_OTG_DEV_HNPREQ = 9, /*!< HNP Request (Only for DEVICE Mode) */
USB_OTG_HST_HNPENABLE = 10, /*!< Host Set HNP Enable (Only for HOST Mode) */
USB_OTG_DEV_HNPENABLE = 11, /*!< Device HNP Enabled (Only for DEVICE Mode) */
} USB_OTG_CTL;

/**
Expand All @@ -129,7 +129,7 @@ typedef enum {

typedef union {
__IO uint32_t HPRT; /*!< Host Port Control and Status Register */

struct {
__I uint32_t PCS : 1; /*!< If a device is attached to the port */
__IO uint32_t PCD : 1; /*!< A device connection is detected */
Expand Down Expand Up @@ -212,7 +212,7 @@ void USB_EnableInt(BOOL enable);

/**
* @brief Flush TX/RX FIFO
* @param[in] num Flush FIFO��0: non-periodic TX FIFO (HOST Mode) or FIFO 0 (DEVICE Mode); 1: Periodic TX FIFO (HOST Mode) or FIFO 1 (DEVICE Mode); 2-15: FIFO n in DEVICE Mode; 16: Flush All TX FIFO; otherwise: Flush RX FIFO
* @param[in] num Flush FIFO, 0: non-periodic TX FIFO (HOST Mode) or FIFO 0 (DEVICE Mode); 1: Periodic TX FIFO (HOST Mode) or FIFO 1 (DEVICE Mode); 2-15: FIFO n in DEVICE Mode; 16: Flush All TX FIFO; otherwise: Flush RX FIFO
* @retval void
*/
void USB_FlushFIFO(uint32_t num);
Expand All @@ -233,7 +233,7 @@ BOOL USB_roleIsHost(void);
/**
* @brief Control and get VBus Status (Only for HOST Mode)
* @param[in] opt Bit1: Set VBus using Bit0; Bit0: Turn VBus On or Off
* @retval BOOL TRUE: VBus is on; FALSE��VBus is off
* @retval BOOL TRUE: VBus is on; FALSE: VBus is off
* @note It cannot control VBus actually due to HW problem
*/
BOOL USB_hostVBus(uint32_t opt);
Expand Down Expand Up @@ -363,13 +363,13 @@ BOOL USB_hostINT_isPCD(void);
void USB_hostINT_clrPCD(void);

/**
* @brief Port Enable/Disable Change��PEDC��Interrupt Asserted (Only for HOST Mode)
* @brief Port Enable/Disable Change (PEDC) Interrupt Asserted (Only for HOST Mode)
* @retval BOOL TRUE: Interrupt Asserted; FALSE: Interrupt is NOT asserted
*/
BOOL USB_hostINT_isPEDC(void);

/**
* @brief Clear Port Enable/Disable Change��PEDC��Interrupt Flag (Only for HOST Mode)
* @brief Clear Port Enable/Disable Change (PEDC) Interrupt Flag (Only for HOST Mode)
* @retval void
*/
void USB_hostINT_clrPEDC(void);
Expand Down Expand Up @@ -520,7 +520,7 @@ void USB_devINT_enDone(uint32_t ep, BOOL in, BOOL en);
* @brief Transaction Done Interrupt Asserted (Only for DEVICE Mode)
* @param[in] ep Endpoint
* @param[in] in Endpoint Direction, TRUE: IN; FALSE: OUT
* @retval uint32_t Result, Bit0: Done; Bit1��Buffer Not Available Error; Bit2: SETUP Phase Done
* @retval uint32_t Result, Bit0: Done; Bit1: Buffer Not Available Error; Bit2: SETUP Phase Done
*/
uint32_t USB_devINT_isDone(uint32_t ep, BOOL in);

Expand Down
2 changes: 1 addition & 1 deletion bsp/allwinner/libraries/sunxi-hal/hal/source/ccmu/sunxi-ng/ccu.h
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Expand Up @@ -45,7 +45,7 @@ struct clk_core;
struct clk_ops;

#undef BIT
#define BIT(x) (1 << (x))
#define BIT(x) (1UL << (x))

#define BITS_PER_LONGS 32
#define GENMASK(h, l) \
Expand Down
2 changes: 1 addition & 1 deletion bsp/allwinner/libraries/sunxi-hal/hal/source/regulator/type.h
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Expand Up @@ -34,7 +34,7 @@ typedef unsigned long long int u64;
#define true 1
#define false 0

#define BIT(nr) (1 << (nr))
#define BIT(nr) (1UL << (nr))

/* Compute the number of elements in the given array */
#define ARRAY_SIZE(a) \
Expand Down
2 changes: 1 addition & 1 deletion bsp/allwinner/libraries/sunxi-hal/hal/source/spinor/inter.h
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Expand Up @@ -13,7 +13,7 @@
#define SPINOR_INFO(fmt, arg...) hal_log_info(SPINOR_FMT(fmt), ##arg)

#ifndef BIT
#define BIT(x) (1 << x)
#define BIT(x) (1UL << (x))
#endif

#ifndef MIN
Expand Down
2 changes: 1 addition & 1 deletion bsp/allwinner_tina/drivers/drv_sdio.h
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Expand Up @@ -63,7 +63,7 @@ typedef struct tina_mmc *tina_mmc_t;
#define MMC1 ((tina_mmc_t)MMC1_BASE_ADDR)


#define BIT(x) (1<<(x))
#define BIT(x) (1UL<<(x))
/* Struct for Intrrrupt Information */
#define SDXC_RespErr BIT(1) //0x2
#define SDXC_CmdDone BIT(2) //0x4
Expand Down
14 changes: 7 additions & 7 deletions bsp/at32/libraries/rt_drivers/drv_gpio.c
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Expand Up @@ -163,7 +163,7 @@ static rt_base_t at32_pin_get(const char *name)
return pin;
}

static void at32_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value)
static void at32_pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value)
{
gpio_type *gpio_port;

Expand All @@ -180,7 +180,7 @@ static void at32_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value)
gpio_bits_write(gpio_port, gpio_pin, (confirm_state)value);
}

static int at32_pin_read(rt_device_t dev, rt_base_t pin)
static rt_int8_t at32_pin_read(rt_device_t dev, rt_base_t pin)
{
gpio_type *gpio_port;
uint16_t gpio_pin;
Expand All @@ -197,7 +197,7 @@ static int at32_pin_read(rt_device_t dev, rt_base_t pin)
return value;
}

static void at32_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode)
static void at32_pin_mode(rt_device_t dev, rt_base_t pin, rt_uint8_t mode)
{
gpio_init_type gpio_init_struct;
gpio_type *gpio_port;
Expand Down Expand Up @@ -279,8 +279,8 @@ rt_inline const struct pin_irq_map *get_pin_irq_map(uint32_t pinbit)
return &pin_irq_map[mapindex];
};

static rt_err_t at32_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
rt_uint32_t mode, void (*hdr)(void *args), void *args)
static rt_err_t at32_pin_attach_irq(struct rt_device *device, rt_base_t pin,
rt_uint8_t mode, void (*hdr)(void *args), void *args)
{
uint16_t gpio_pin;
rt_base_t level;
Expand Down Expand Up @@ -324,7 +324,7 @@ static rt_err_t at32_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
return RT_EOK;
}

static rt_err_t at32_pin_dettach_irq(struct rt_device *device, rt_int32_t pin)
static rt_err_t at32_pin_dettach_irq(struct rt_device *device, rt_base_t pin)
{
uint16_t gpio_pin;
rt_base_t level;
Expand Down Expand Up @@ -360,7 +360,7 @@ static rt_err_t at32_pin_dettach_irq(struct rt_device *device, rt_int32_t pin)
}

static rt_err_t at32_pin_irq_enable(struct rt_device *device, rt_base_t pin,
rt_uint32_t enabled)
rt_uint8_t enabled)
{
gpio_init_type gpio_init_struct;
exint_init_type exint_init_struct;
Expand Down
2 changes: 1 addition & 1 deletion bsp/bluetrum/libraries/hal_libraries/bmsis/include/ab32vgx.h
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Expand Up @@ -13,7 +13,7 @@
#define UINT_MAX 0xffffffff
#endif // UINT_MAX

#define BIT(n) (1ul << (n))
#define BIT(n) (1UL << (n))

#define AT(x) __attribute__((section(#x)))
#define ALIGNED(n) __attribute__((aligned(n)))
Expand Down
2 changes: 1 addition & 1 deletion bsp/qemu-virt64-aarch64/drivers/drv_gpio.c
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Expand Up @@ -26,7 +26,7 @@
#define GPIOMIS 0x418
#define GPIOIC 0x41c

#define BIT(x) (1 << (x))
#define BIT(x) (1UL << (x))

#define PL061_GPIO_NR 8

Expand Down
4 changes: 4 additions & 0 deletions bsp/stm32/libraries/HAL_Drivers/drv_usart.c
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Expand Up @@ -108,7 +108,11 @@ static rt_err_t stm32_configure(struct rt_serial_device *serial, struct serial_c
uart->handle.Instance = uart->config->Instance;
uart->handle.Init.BaudRate = cfg->baud_rate;
uart->handle.Init.Mode = UART_MODE_TX_RX;
#ifdef USART_CR1_OVER8
uart->handle.Init.OverSampling = cfg->baud_rate > 5000000 ? UART_OVERSAMPLING_8 : UART_OVERSAMPLING_16;
#else
uart->handle.Init.OverSampling = UART_OVERSAMPLING_16;
#endif /* USART_CR1_OVER8 */

switch (cfg->flowcontrol)
{
Expand Down
5 changes: 4 additions & 1 deletion bsp/stm32/libraries/HAL_Drivers/drv_usart_v2.c
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Expand Up @@ -116,11 +116,14 @@ static rt_err_t stm32_configure(struct rt_serial_device *serial, struct serial_c
RT_ASSERT(cfg != RT_NULL);

uart = rt_container_of(serial, struct stm32_uart, serial);

uart->handle.Instance = uart->config->Instance;
uart->handle.Init.BaudRate = cfg->baud_rate;
uart->handle.Init.Mode = UART_MODE_TX_RX;
#ifdef USART_CR1_OVER8
uart->handle.Init.OverSampling = cfg->baud_rate > 5000000 ? UART_OVERSAMPLING_8 : UART_OVERSAMPLING_16;
#else
uart->handle.Init.OverSampling = UART_OVERSAMPLING_16;
#endif /* USART_CR1_OVER8 */

switch (cfg->data_bits)
{
Expand Down
2 changes: 1 addition & 1 deletion bsp/stm32/stm32mp157a-st-discovery/board/ports/drv_pmic.h
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Expand Up @@ -325,7 +325,7 @@ typedef struct {
#define OTP_OUTPUT_LDO5 ((NVM_SECTOR3_REGISTER_6 & 0x03)) // nvm_output_ldo5

#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
#define BIT(_x) (1<<(_x))
#define BIT(_x) (1UL << (_x))
#define STM32_PMIC_NUM_IRQ_REGS 4

#define TURN_ON_REG 0x1
Expand Down
2 changes: 1 addition & 1 deletion bsp/stm32/stm32mp157a-st-ev1/board/ports/drv_pmic.h
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Expand Up @@ -325,7 +325,7 @@ typedef struct {
#define OTP_OUTPUT_LDO5 ((NVM_SECTOR3_REGISTER_6 & 0x03)) // nvm_output_ldo5

#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
#define BIT(_x) (1<<(_x))
#define BIT(_x) (1UL << (_x))
#define STM32_PMIC_NUM_IRQ_REGS 4

#define TURN_ON_REG 0x1
Expand Down
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