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Define SDRAM frequency and refresh cycles.

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Code size report:

   bare-arm:    +0 +0.000% 
minimal x86:    +0 +0.000% 
   unix x64:    +0 +0.000% standard
      stm32:    +0 +0.000% PYBV10
     mimxrt:    +0 +0.000% TEENSY40
        rp2:    +0 +0.000% RPI_PICO_W
       samd:    +0 +0.000% ADAFRUIT_ITSYBITSY_M4_EXPRESS
  qemu rv32:    +0 +0.000% VIRT_RV32

Define SDRAM frequency and refresh cycles.  This was missed in commit
17808e7.

Signed-off-by: iabdalkader <i.abdalkader@gmail.com>
@dpgeorge dpgeorge merged commit 94343e2 into micropython:master Dec 11, 2024
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Thanks.

@iabdalkader iabdalkader deleted the stm32f4_disc_sdram branch December 11, 2024 05:29
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2 participants