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2 changes: 1 addition & 1 deletion openhcl/hcl/src/ioctl/tdx.rs
Original file line number Diff line number Diff line change
Expand Up @@ -515,7 +515,7 @@ pub struct TdxPrivateRegs {
pub msr_xss: u64,
pub msr_tsc_aux: u64,
// VP Entry flags
#[inspect(with = "|x| inspect::AsHex(x.into_bits())")]
#[inspect(hex, with = "|x| x.into_bits()")]
pub vp_entry_flags: TdxVmFlags,
}

Expand Down
10 changes: 5 additions & 5 deletions openhcl/host_fdt_parser/src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -1077,11 +1077,11 @@ mod inspect_helpers {
// TODO: inspect::AsDebug would work here once
// https://github.com/kupiakos/open-enum/pull/13 is merged.
inspect::adhoc(|req| match *typ {
MemoryMapEntryType::MEMORY => req.value("MEMORY".into()),
MemoryMapEntryType::PERSISTENT => req.value("PERSISTENT".into()),
MemoryMapEntryType::PLATFORM_RESERVED => req.value("PLATFORM_RESERVED".into()),
MemoryMapEntryType::VTL2_PROTECTABLE => req.value("VTL2_PROTECTABLE".into()),
_ => req.value(typ.0.into()),
MemoryMapEntryType::MEMORY => req.value("MEMORY"),
MemoryMapEntryType::PERSISTENT => req.value("PERSISTENT"),
MemoryMapEntryType::PLATFORM_RESERVED => req.value("PLATFORM_RESERVED"),
MemoryMapEntryType::VTL2_PROTECTABLE => req.value("VTL2_PROTECTABLE"),
_ => req.value(typ.0),
})
}

Expand Down
2 changes: 1 addition & 1 deletion openhcl/lower_vtl_permissions_guard/src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -24,7 +24,7 @@ use virt::VtlMemoryProtection;
struct PagesAccessibleToLowerVtl {
#[inspect(skip)]
vtl_protect: Arc<dyn VtlMemoryProtection + Send + Sync>,
#[inspect(with = "|x| inspect::iter_by_index(x).map_value(inspect::AsHex)")]
#[inspect(hex, iter_by_index)]
pages: Vec<u64>,
}

Expand Down
12 changes: 6 additions & 6 deletions openhcl/underhill_core/src/dispatch/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -824,11 +824,11 @@ mod inspect_helpers {
// TODO: inspect::AsDebug would work here once
// https://github.com/kupiakos/open-enum/pull/15 is merged.
inspect::adhoc(|req| match *typ {
MemoryMapEntryType::MEMORY => req.value("MEMORY".into()),
MemoryMapEntryType::PERSISTENT => req.value("PERSISTENT".into()),
MemoryMapEntryType::PLATFORM_RESERVED => req.value("PLATFORM_RESERVED".into()),
MemoryMapEntryType::VTL2_PROTECTABLE => req.value("VTL2_PROTECTABLE".into()),
_ => req.value(typ.0.into()),
MemoryMapEntryType::MEMORY => req.value("MEMORY"),
MemoryMapEntryType::PERSISTENT => req.value("PERSISTENT"),
MemoryMapEntryType::PLATFORM_RESERVED => req.value("PLATFORM_RESERVED"),
MemoryMapEntryType::VTL2_PROTECTABLE => req.value("VTL2_PROTECTABLE"),
_ => req.value(typ.0),
})
}

Expand All @@ -840,7 +840,7 @@ mod inspect_helpers {
entry.range,
inspect::adhoc(|req| {
req.respond()
.field("length", inspect::AsHex(entry.range.len()))
.hex("length", entry.range.len())
.field("type", inspect_memory_map_entry_type(typ))
.field("vnode", entry.vnode);
}),
Expand Down
4 changes: 2 additions & 2 deletions openhcl/underhill_core/src/inspect_internal.rs
Original file line number Diff line number Diff line change
Expand Up @@ -68,7 +68,7 @@ fn net(req: Request<'_>, reinspect: Sender<Deferred>, driver: DefaultDriver) {
vm_inspection.resolve().await;

let Node::Dir(nodes) = vm_inspection.results() else {
return defer.value("Error: No VM node.".into());
return defer.value("Error: No VM node.");
};

defer.respond(|resp| {
Expand Down Expand Up @@ -146,7 +146,7 @@ fn net_nic(req: Request<'_>, name: String, reinspect: Sender<Deferred>, driver:
}
})
} else {
defer.value(format!("Unexpected node when looking for NIC {name}.").into());
defer.value(format!("Unexpected node when looking for NIC {name}."));
}
})
.detach();
Expand Down
4 changes: 2 additions & 2 deletions openhcl/underhill_core/src/nvme_manager.rs
Original file line number Diff line number Diff line change
Expand Up @@ -78,7 +78,7 @@ impl Inspect for NvmeManager {
.sender
.send(Request::ForceLoadDriver(update.defer()));
}
Err(req) => req.value("".into()),
Err(req) => req.value(""),
});
// Send the remaining fields directly to the worker.
self.client
Expand Down Expand Up @@ -231,7 +231,7 @@ impl NvmeManagerWorker {
Request::ForceLoadDriver(update) => {
match self.get_driver(update.new_value().to_owned()).await {
Ok(_) => {
let pci_id = update.new_value().into();
let pci_id = update.new_value().to_string();
update.succeed(pci_id);
}
Err(err) => {
Expand Down
9 changes: 4 additions & 5 deletions openhcl/underhill_core/src/threadpool_vm_task_backend.rs
Original file line number Diff line number Diff line change
Expand Up @@ -44,11 +44,10 @@ enum Target {

impl Inspect for Target {
fn inspect(&self, req: inspect::Request<'_>) {
let v = match self {
Target::Untargeted(_) => "any".into(),
Target::Targeted(driver) => driver.current_target_cpu().into(),
};
req.value(v)
match self {
Target::Untargeted(_) => req.value("any"),
Target::Targeted(driver) => req.value(driver.current_target_cpu()),
}
}
}

Expand Down
5 changes: 3 additions & 2 deletions openhcl/virt_mshv_vtl/src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -223,7 +223,7 @@ struct UhPartitionInner {
intercept_debug_exceptions: bool,
#[cfg(guest_arch = "x86_64")]
// N.B For now, only one device vector table i.e. for VTL0 only
#[inspect(with = "|x| inspect::iter_by_index(x.read().into_inner().map(inspect::AsHex))")]
#[inspect(hex, with = "|x| inspect::iter_by_index(x.read().into_inner())")]
device_vector_table: RwLock<IrrBitmap>,
vmbus_relay: bool,
}
Expand Down Expand Up @@ -426,9 +426,10 @@ impl UhCvmVpState {

#[cfg(guest_arch = "x86_64")]
#[derive(Inspect, Default)]
#[inspect(hex)]
/// Configuration of VTL 1 registration for intercepts on certain registers
pub struct SecureRegisterInterceptState {
#[inspect(with = "|x| inspect::AsHex(u64::from(*x))")]
#[inspect(with = "|&x| u64::from(x)")]
intercept_control: hvdef::HvRegisterCrInterceptControl,
cr0_mask: u64,
cr4_mask: u64,
Expand Down
6 changes: 3 additions & 3 deletions openhcl/virt_mshv_vtl/src/processor/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -95,9 +95,9 @@ pub struct UhProcessor<'a, T: Backing> {
idle_control: Option<&'a mut IdleControl>,
#[inspect(skip)]
kernel_returns: u64,
#[inspect(with = "|x| inspect::iter_by_index(x).map_value(inspect::AsHex)")]
#[inspect(hex, iter_by_index)]
crash_reg: [u64; hvdef::HV_X64_GUEST_CRASH_PARAMETER_MSRS],
#[inspect(with = "|x| inspect::AsHex(u64::from(*x))")]
#[inspect(hex, with = "|&x| u64::from(x)")]
crash_control: hvdef::GuestCrashCtl,
vmtime: VmTimeAccess,
#[inspect(skip)]
Expand All @@ -108,7 +108,7 @@ pub struct UhProcessor<'a, T: Backing> {
vtls_tlb_locked: VtlsTlbLocked,
#[inspect(skip)]
shared: &'a T::Shared,
#[inspect(with = "|x| inspect::iter_by_index(x.iter()).map_value(|a| inspect::AsHex(a.0))")]
#[inspect(hex, with = "|x| inspect::iter_by_index(x.iter()).map_value(|a| a.0)")]
exit_activities: VtlArray<ExitActivity, 2>,

// Put the runner and backing at the end so that monomorphisms of functions
Expand Down
4 changes: 2 additions & 2 deletions openhcl/virt_mshv_vtl/src/processor/mshv/arm64.rs
Original file line number Diff line number Diff line change
Expand Up @@ -63,9 +63,9 @@ use zerocopy::IntoBytes;
/// software-isolated).
#[derive(InspectMut)]
pub struct HypervisorBackedArm64 {
#[inspect(with = "|x| inspect::AsHex(u64::from(*x))")]
#[inspect(hex, with = "|&x| u64::from(x)")]
deliverability_notifications: HvDeliverabilityNotificationsRegister,
#[inspect(with = "|x| inspect::AsHex(u64::from(*x))")]
#[inspect(hex, with = "|&x| u64::from(x)")]
next_deliverability_notifications: HvDeliverabilityNotificationsRegister,
stats: ProcessorStatsArm64,
}
Expand Down
2 changes: 1 addition & 1 deletion openhcl/virt_mshv_vtl/src/processor/mshv/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -9,7 +9,7 @@ pub mod x64;

#[derive(Default, inspect::Inspect)]
pub(crate) struct VbsIsolatedVtl1State {
#[inspect(with = "|flags| flags.map(|f| inspect::AsHex(u32::from(f)))")]
#[inspect(hex, with = "|flags| flags.map(u32::from)")]
default_vtl_protections: Option<hvdef::HvMapGpaFlags>,
enable_vtl_protection: bool,
}
4 changes: 2 additions & 2 deletions openhcl/virt_mshv_vtl/src/processor/mshv/x64.rs
Original file line number Diff line number Diff line change
Expand Up @@ -83,10 +83,10 @@ use zerocopy::KnownLayout;
pub struct HypervisorBackedX86 {
// VTL0 only, used for synic message and extint readiness notifications.
// We do not currently support synic message ports or extint interrupts for VTL1.
#[inspect(with = "|x| inspect::AsHex(u64::from(*x))")]
#[inspect(hex, with = "|&x| u64::from(x)")]
deliverability_notifications: HvDeliverabilityNotificationsRegister,
/// Next set of deliverability notifications. See register definition for details.
#[inspect(with = "|x| inspect::AsHex(u64::from(*x))")]
#[inspect(hex, with = "|&x| u64::from(x)")]
pub(super) next_deliverability_notifications: HvDeliverabilityNotificationsRegister,
stats: ProcessorStatsX86,
}
Expand Down
11 changes: 4 additions & 7 deletions openhcl/virt_mshv_vtl/src/processor/snp/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -557,13 +557,10 @@ impl BackingPrivate for SnpBacked {

let add_vmsa_inspect = |req: inspect::Request<'_>, vmsa: VmsaWrapper<'_, &SevVmsa>| {
req.respond()
.field("guest_error_code", inspect::AsHex(vmsa.guest_error_code()))
.field("exit_info1", inspect::AsHex(vmsa.exit_info1()))
.field("exit_info2", inspect::AsHex(vmsa.exit_info2()))
.field(
"v_intr_cntrl",
inspect::AsHex(u64::from(vmsa.v_intr_cntrl())),
);
.hex("guest_error_code", vmsa.guest_error_code())
.hex("exit_info1", vmsa.exit_info1())
.hex("exit_info2", vmsa.exit_info2())
.hex("v_intr_cntrl", u64::from(vmsa.v_intr_cntrl()));
};

resp.child("vmsa_additional", |req| {
Expand Down
2 changes: 1 addition & 1 deletion openhcl/virt_mshv_vtl/src/processor/tdx/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -355,7 +355,7 @@ pub struct TdxBacked {
vtls: VtlArray<TdxVtl, 2>,

untrusted_synic: Option<ProcessorSynic>,
#[inspect(with = "|x| inspect::iter_by_index(x).map_value(inspect::AsHex)")]
#[inspect(hex, iter_by_index)]
eoi_exit_bitmap: [u64; 4],

/// A mapped page used for issuing INVGLA hypercalls.
Expand Down
2 changes: 1 addition & 1 deletion openhcl/virt_mshv_vtl/src/processor/tdx/tlb_flush.rs
Original file line number Diff line number Diff line change
Expand Up @@ -24,7 +24,7 @@ pub(super) const FLUSH_GVA_LIST_SIZE: usize = 32;
#[derive(Debug, Inspect)]
pub(super) struct TdxPartitionFlushState {
/// A fixed-size ring buffer of GVAs that need to be flushed.
#[inspect(with = "|vd| inspect::iter_by_index(vd).map_value(|g| inspect::AsHex(g.0))")]
#[inspect(hex, with = "|vd| inspect::iter_by_index(vd).map_value(|g| g.0)")]
pub(super) gva_list: VecDeque<HvGvaRange>,
pub(super) s: TdxFlushState,
}
Expand Down
18 changes: 9 additions & 9 deletions support/inspect/fuzz/fuzz_inspect.rs
Original file line number Diff line number Diff line change
Expand Up @@ -14,7 +14,7 @@ use inspect::Node;
use inspect::Request;
use inspect::Response;
use inspect::SensitivityLevel;
use inspect::Value;
use inspect::ValueKind;
use xtask_fuzz::fuzz_eprintln;
use xtask_fuzz::fuzz_target;

Expand All @@ -41,7 +41,7 @@ impl InspectNode<'_, '_> {
match self.u.int_in_range(0..=5)? {
0 => {
fuzz_eprintln!("value");
req.value(self.u.arbitrary()?)
req.value(self.u.arbitrary::<ValueKind>()?)
}
1 => {
fuzz_eprintln!("ignore");
Expand All @@ -57,7 +57,7 @@ impl InspectNode<'_, '_> {
match self.u.int_in_range(0..=6)? {
0 => {
fuzz_eprintln!("value");
defer.value(self.u.arbitrary()?)
defer.value(self.u.arbitrary::<ValueKind>()?)
}
1 => {
fuzz_eprintln!("ignore");
Expand Down Expand Up @@ -106,7 +106,7 @@ impl InspectNode<'_, '_> {
match parse_attempt {
Ok(new_val) => {
fuzz_eprintln!("succeed");
upd.succeed(new_val.into());
upd.succeed(new_val);
}
Err(e) => {
fuzz_eprintln!("fail");
Expand Down Expand Up @@ -134,23 +134,23 @@ impl InspectNode<'_, '_> {
}
1 => {
fuzz_eprintln!("hex");
resp.hex(self.u.arbitrary()?, Value::arbitrary(self.u)?)
resp.hex(self.u.arbitrary()?, ValueKind::arbitrary(self.u)?)
}
2 => {
fuzz_eprintln!("counter");
resp.counter(self.u.arbitrary()?, Value::arbitrary(self.u)?)
resp.counter(self.u.arbitrary()?, ValueKind::arbitrary(self.u)?)
}
3 => {
fuzz_eprintln!("sensitivity_counter");
resp.sensitivity_counter(
self.u.arbitrary()?,
self.u.arbitrary()?,
Value::arbitrary(self.u)?,
ValueKind::arbitrary(self.u)?,
)
}
4 => {
fuzz_eprintln!("binary");
resp.binary(self.u.arbitrary()?, Value::arbitrary(self.u)?)
resp.binary(self.u.arbitrary()?, ValueKind::arbitrary(self.u)?)
}
5 => {
fuzz_eprintln!("display");
Expand Down Expand Up @@ -226,7 +226,7 @@ fn do_defer_update(upd: DeferredUpdate) {
match parse_attempt {
Ok(new_val) => {
fuzz_eprintln!("succeed");
upd.succeed(new_val.into());
upd.succeed(new_val);
}
Err(e) => {
fuzz_eprintln!("fail");
Expand Down
22 changes: 18 additions & 4 deletions support/inspect/src/defer.rs
Original file line number Diff line number Diff line change
Expand Up @@ -10,7 +10,8 @@ use super::RequestRoot;
use super::Response;
use super::SensitivityLevel;
use super::UpdateRequest;
use super::Value;
use crate::NumberFormat;
use crate::ValueKind;
use alloc::borrow::ToOwned;
use alloc::string::String;
use mesh::MeshPayload;
Expand All @@ -27,6 +28,7 @@ impl Request<'_> {
depth: self.depth,
node: send,
sensitivity: self.sensitivity,
number_format: self.number_format,
}
}
}
Expand All @@ -41,6 +43,7 @@ impl UpdateRequest<'_> {
DeferredUpdate {
value: self.value.to_owned(),
node: send,
number_format: self.number_format,
}
}
}
Expand All @@ -54,6 +57,7 @@ pub struct Deferred {
depth: usize,
node: mesh::OneshotSender<InternalNode>,
sensitivity: SensitivityLevel,
number_format: NumberFormat,
}

impl Deferred {
Expand All @@ -74,7 +78,10 @@ impl Deferred {
}

/// Responds to the deferred request with a value.
pub fn value(self, value: Value) {
pub fn value(self, value: impl Into<ValueKind>) {
self.value_(value.into())
}
fn value_(self, value: ValueKind) {
let mut root = self.root();
root.request().value(value);
let node = root.node;
Expand All @@ -89,6 +96,7 @@ impl Deferred {
Ok(DeferredUpdate {
value: self.value.unwrap(),
node: self.node,
number_format: self.number_format,
})
} else {
Err(self)
Expand All @@ -101,6 +109,7 @@ impl Deferred {
self.depth,
self.value.as_deref(),
self.sensitivity,
self.number_format,
)
}

Expand Down Expand Up @@ -255,6 +264,7 @@ pub enum ExternalRequestType<'a> {
pub struct DeferredUpdate {
value: String,
node: mesh::OneshotSender<InternalNode>,
number_format: NumberFormat,
}

impl DeferredUpdate {
Expand All @@ -264,8 +274,12 @@ impl DeferredUpdate {
}

/// Report that the update succeeded, with a new value of `value`.
pub fn succeed(self, value: Value) {
self.node.send(InternalNode::Value(value));
pub fn succeed(self, value: impl Into<ValueKind>) {
self.succeed_(value.into())
}
fn succeed_(self, value: ValueKind) {
self.node
.send(InternalNode::Value(value.with_format(self.number_format)));
}

/// Report that the update failed, with the reason in `err`.
Expand Down
2 changes: 2 additions & 0 deletions support/inspect/src/initiate.rs
Original file line number Diff line number Diff line change
Expand Up @@ -12,6 +12,7 @@ use super::RequestRoot;
use super::SensitivityLevel;
use super::Value;
use super::ValueKind;
use crate::NumberFormat;
use alloc::borrow::ToOwned;
use alloc::string::String;
use alloc::string::ToString;
Expand Down Expand Up @@ -397,6 +398,7 @@ impl<'a> InspectionBuilder<'a> {
depth_with_root,
value,
sensitivity.unwrap_or(SensitivityLevel::Sensitive),
NumberFormat::default(),
);
obj.inspect_mut(root.request());
(root, path_node_count(path))
Expand Down
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