Motivated and detail-oriented mechanical graduate student currently pursuinga master’s degree in mechatronics at the University of Southern Denmark(SDU)
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LED-T-Shirt
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Verilog_testbench_dataset
Verilog_testbench_dataset PublicToward Unified HDL Verification: A Multi-Language Synthetic Dataset and LoRA Fine-Tuning Framework for Verilog Testbench Generation.
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