System Architecture

Block Diagram of rough system architecture

This image shows a rough block diagram of communication between three devices, where each message is timestamped. Devices 1 and 2 send timestamps t1 through t4 to each other, Devices 2 and 3 send timestamps t5 through t8 to each other, and Devices 1 and 3 send timestamps t9 through t12 to each other. Each timestamp must be taken at hardware level, as software level timekeeping methods are not precise enough for our application. Each of the timestamps are taken as input into a time synchronization protocol that derives the offset, drift, and propagation delay between a pair of devices. This information is then used to force synchronization between the two devices.