The repository includes the implementation of Connect Four game in SystemVerilog.
The game can be played in one FPGA using the code in code_for_one_FPGA folder or in two FPGAs using the code in code_for_two_FPGAs folder. A function automatic_player() implementing a "smart" automatic opponent, with whom you can play against, is also included in the code.
This project was implemented in the VLSI course of the 8th semester of ECE DUTh which was supervised by the Associate Professor George Dimitrakopoulos.
To get started make sure you have installed all the prerequisites in your computer.
To compile this implementation of Connect Four game you will need ModelSim-Intel® FPGA Edition Software.
In ModelSim execute the following commands:
cd c:/workspace/Connect-Four(project's directory)vlib workvlog score4.sv score4_tb.svvsim -novopt score4_tbrun -all
To visualize the frames produced by the code use the online VGA simulator.
Contributions are what make the open source community such an amazing place to be, learn, inspire, and create.
Contribute following the above steps:
- Fork the Project
- Create your Feature Branch (
git checkout -b new_branch_name) - Commit your Changes (
git commit -m 'Add some extra functionality') - Push to the Branch (
git push origin new_branch_name) - Open a Pull Request