Goal
A trace file from -trace is a complete instruction-by-instruction record. Loading one back into the TUI as a step-able history would let users:
- Diff a known-good trace against a divergent run, jumping to the first mismatch.
- Step forward / backward through a captured bug without re-running the CPU.
- Share traces (with consent) for debugging help.
Sketch
- New mode:
chippy -replay trace.log boots without a CPU, drives the disasm + register panels from parsed trace lines.
- Stepping advances/rewinds the trace cursor; the model fakes register state from each line.
- Breakpoints become "break on PC = X" search-forward.
- Memory panel is best-effort (trace doesn't record writes — could extend the trace format with a memory-delta line later).
Acceptance
chippy -replay t.log opens a TUI that scrubs through the recorded instructions with the same UX as live debugging.
Goal
A trace file from
-traceis a complete instruction-by-instruction record. Loading one back into the TUI as a step-able history would let users:Sketch
chippy -replay trace.logboots without a CPU, drives the disasm + register panels from parsed trace lines.Acceptance
chippy -replay t.logopens a TUI that scrubs through the recorded instructions with the same UX as live debugging.