HDLBits Dataset for RLFT [test]

[noobsiecoder]

Dataset Collection

• Gather questions from HDLBits across categories:
  • Basics
  • Vectors
  • Modules & Hierarchy
  • Procedures
  • Combinational Logic (Gates, Multiplexers, Arithmetic Circuits, etc.)
  • Sequential Logic (Latches, Flip-flops, Counters, Shift Registers, etc.)
• Expand coverage with augmented questions (variation, rephrasing, scaling difficulty)
• Prepare additional sources if needed (e.g., RTL-Repo, custom prompts)

Dataset Structuring

• Define consistent schema:
  • Question / Problem statement
  • Expected input/output behavior (testbench or truth table)
  • Ground truth solution (reference Verilog code)
• Ensure compatibility with reward functions (compilation, synthesis, functional correctness, etc.)
• Keep some for evals (5%-10%)

Documentation

• Document dataset structure (fields, formatting rules)
• Provide small example subset in repo for reference
• Note augmentation methods used and rationale

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Notes

• Initial dataset size: ~20–50 HDLBits problems
• Augmented to increase volume while retaining diversity
• Benchmarking targets: VerilogEval, VeriReason Benchmarks, and RTL-Repo (for external validation)

[noobsiecoder]

Test data added in previous commits