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draft: vpr various fixes #2425

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draft: vpr various fixes #2425

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3449d2b
soc: nordic: common: vpr: Remove tp register
karstenkoenig Jan 14, 2025
776a908
dts: common: nordic: nrf54h20: Fix flpr bus-width
karstenkoenig Jan 14, 2025
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2 changes: 1 addition & 1 deletion dts/common/nordic/nrf54h20.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -84,7 +84,7 @@
device_type = "cpu";
clock-frequency = <DT_FREQ_M(320)>;
riscv,isa = "rv32emc";
nordic,bus-width = <64>;
nordic,bus-width = <32>;

cpuflpr_vevif_rx: mailbox {
compatible = "nordic,nrf-vevif-task-rx";
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7 changes: 1 addition & 6 deletions soc/nordic/common/vpr/soc_context.h
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Expand Up @@ -8,14 +8,9 @@

#define SOC_ESF_MEMBERS \
unsigned long minttresh; \
unsigned long sp_align; \
unsigned long padding0; \
unsigned long padding1; \
unsigned long padding2
unsigned long sp_align;

Check notice on line 11 in soc/nordic/common/vpr/soc_context.h

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soc/nordic/common/vpr/soc_context.h:11 
-#define SOC_ESF_MEMBERS						\
-	unsigned long minttresh;				\
+#define SOC_ESF_MEMBERS                                                                            \
+	unsigned long minttresh;                                                                   \

#define SOC_ESF_INIT \
0, \
0, \
0, \
0

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4 changes: 1 addition & 3 deletions soc/nordic/common/vpr/soc_isr_stacking.h
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Expand Up @@ -20,7 +20,6 @@
struct arch_esf { \
unsigned long s0; \
unsigned long mstatus; \
unsigned long tp; \
struct soc_esf soc_context; \
\
unsigned long t2; \
Expand All @@ -43,7 +42,6 @@
struct arch_esf { \
unsigned long s0; \
unsigned long mstatus; \
unsigned long tp; \
struct soc_esf soc_context; \
\
unsigned long ra; \
Expand Down Expand Up @@ -79,8 +77,8 @@
* Size of the SW managed part of the ESF in case of interrupt
* sizeof(__padding) + ... + sizeof(soc_context)
*/
#define ESF_SW_IRQ_SIZEOF (0x20)
#define ESF_SW_IRQ_SIZEOF (0x10)

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soc/nordic/common/vpr/soc_isr_stacking.h:81 
-#define ESF_SW_IRQ_SIZEOF (0x10)
+#define ESF_SW_IRQ_SIZEOF      (0x10)
/*
* VPR needs aligned(8) SP when doing HW stacking, if this condition is not fulfilled it will move
* SP by additional 4 bytes when HW stacking is done. This will be indicated by LSB bit in stacked
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