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6 changes: 4 additions & 2 deletions boards/nordic/nrf54h20dk/Kconfig.nrf54h20dk
Original file line number Diff line number Diff line change
Expand Up @@ -4,9 +4,11 @@
config BOARD_NRF54H20DK
select SOC_NRF54H20_CPUAPP if (BOARD_NRF54H20DK_NRF54H20_CPUAPP || \
BOARD_NRF54H20DK_NRF54H20_CPUAPP_IRON)
select SOC_NRF54H20_CPURAD if BOARD_NRF54H20DK_NRF54H20_CPURAD
select SOC_NRF54H20_CPURAD if (BOARD_NRF54H20DK_NRF54H20_CPURAD || \
BOARD_NRF54H20DK_NRF54H20_CPURAD_IRON)
select SOC_NRF54H20_CPUPPR if (BOARD_NRF54H20DK_NRF54H20_CPUPPR || \
BOARD_NRF54H20DK_NRF54H20_CPUPPR_XIP)
select SOC_NRF54H20_CPUFLPR if (BOARD_NRF54H20DK_NRF54H20_CPUFLPR || \
BOARD_NRF54H20DK_NRF54H20_CPUFLPR_XIP)
select SOC_NRF54H20_IRON if BOARD_NRF54H20DK_NRF54H20_CPUAPP_IRON
select SOC_NRF54H20_IRON if (BOARD_NRF54H20DK_NRF54H20_CPUAPP_IRON || \
BOARD_NRF54H20DK_NRF54H20_CPURAD_IRON)
7 changes: 5 additions & 2 deletions boards/nordic/nrf54h20dk/board.cmake
Original file line number Diff line number Diff line change
Expand Up @@ -2,8 +2,11 @@

include(${ZEPHYR_BASE}/boards/common/nrfutil.board.cmake)

if(CONFIG_BOARD_NRF54H20DK_NRF54H20_CPUAPP OR CONFIG_BOARD_NRF54H20DK_NRF54H20_CPURAD)
if(CONFIG_BOARD_NRF54H20DK_NRF54H20_CPUAPP)
if(CONFIG_BOARD_NRF54H20DK_NRF54H20_CPUAPP OR
CONFIG_BOARD_NRF54H20DK_NRF54H20_CPURAD OR
CONFIG_BOARD_NRF54H20DK_NRF54H20_CPUAPP_IRON OR
CONFIG_BOARD_NRF54H20DK_NRF54H20_CPURAD_IRON)
if(CONFIG_SOC_NRF54H20_CPUAPP)
set(JLINKSCRIPTFILE ${CMAKE_CURRENT_LIST_DIR}/support/nrf54h20_cpuapp.JLinkScript)
else()
set(JLINKSCRIPTFILE ${CMAKE_CURRENT_LIST_DIR}/support/nrf54h20_cpurad.JLinkScript)
Expand Down
2 changes: 2 additions & 0 deletions boards/nordic/nrf54h20dk/board.yml
Original file line number Diff line number Diff line change
Expand Up @@ -11,6 +11,8 @@ board:
cpucluster: cpuflpr
- name: iron
cpucluster: cpuapp
- name: iron
cpucluster: cpurad
revision:
format: major.minor.patch
default: "0.9.0"
Expand Down
4 changes: 4 additions & 0 deletions boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpuapp_iron.dts
Original file line number Diff line number Diff line change
Expand Up @@ -52,6 +52,10 @@
reg = <0xe4000 DT_SIZE_K(64)>;
};

cpurad_slot0_partition: partition@54000 {
reg = <0x54000 DT_SIZE_K(256)>;
};

cpuflpr_code_partition: partition@f4000 {
reg = <0xf4000 DT_SIZE_K(48)>;
};
Expand Down
30 changes: 30 additions & 0 deletions boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpurad_iron.dts
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I think at this point we should move the memory map into one file (I see that zephyrproject-rtos/zephyr#88937 does this)

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@SebastianBoe SebastianBoe Apr 28, 2025

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discussed offline. will be done at a later time

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fixed

Original file line number Diff line number Diff line change
@@ -0,0 +1,30 @@
/*
* Copyright (c) 2025 Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*/

#include "nrf54h20dk_nrf54h20_cpurad.dts"

/delete-node/&cpurad_rx_partitions;
/delete-node/&cpuapp_rx_partitions;

/ {
chosen {
zephyr,code-partition = &cpurad_slot0_partition;
zephyr,uart-mcumgr = &uart135;
};
};

&mram1x {
cpurad_rx_partitions: cpurad-rx-partitions {
compatible = "nordic,owned-partitions", "fixed-partitions";
nordic,access = <NRF_OWNER_ID_RADIOCORE NRF_PERM_RXS>;
#address-cells = <1>;
#size-cells = <1>;

cpurad_slot0_partition: partition@54000 {
reg = < 0x54000 0x40000 >;
};
};
};
Original file line number Diff line number Diff line change
@@ -0,0 +1,20 @@
# Copyright (c) 2025 Nordic Semiconductor ASA
# SPDX-License-Identifier: Apache-2.0

identifier: nrf54h20dk/nrf54h20/cpurad/iron
name: nRF54H20-DK-nRF54H20-Radio (IRONside SE compatible) (revision 0.9.0)
type: mcu
arch: arm
toolchain:
- gnuarmemb
- xtools
- zephyr
sysbuild: true
ram: 192
flash: 256
supported:
- counter
- gpio
- pwm
- retained_mem
- spi
31 changes: 31 additions & 0 deletions boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpurad_iron_defconfig
Original file line number Diff line number Diff line change
@@ -0,0 +1,31 @@
# Copyright (c) 2025 Nordic Semiconductor ASA
# SPDX-License-Identifier: Apache-2.0

# Enable UART driver
CONFIG_SERIAL=y

# Enable console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y

CONFIG_USE_DT_CODE_PARTITION=y

# Enable MPU
CONFIG_ARM_MPU=y

# Enable hardware stack protection
CONFIG_HW_STACK_PROTECTION=y

# MPU-based null-pointer dereferencing detection cannot be applied
# as the (0x0 - 0x400) region is unmapped for this target.
CONFIG_NULL_POINTER_EXCEPTION_DETECTION_NONE=y

# Enable cache
CONFIG_CACHE_MANAGEMENT=y
CONFIG_EXTERNAL_CACHE=y

# GPD is built on top of NRFS and NRFS support requires SSFv2
CONFIG_SOC_NRF54H20_GPD=n

# UICR generation is not supported, and when reintroduced will not use nrf-regtool.
CONFIG_NRF_REGTOOL_GENERATE_UICR=n
Original file line number Diff line number Diff line change
@@ -0,0 +1,4 @@
# Copyright (c) 2024 Nordic Semiconductor ASA
# SPDX-License-Identifier: Apache-2.0

CONFIG_SOC_NRF54H20_CPURAD_ENABLE=y
5 changes: 5 additions & 0 deletions samples/sysbuild/hello_world/sample.yaml
Original file line number Diff line number Diff line change
Expand Up @@ -27,6 +27,11 @@ tests:
- nrf54h20dk/nrf54h20/cpuapp
extra_args: SB_CONF_FILE=sysbuild/nrf54h20dk_nrf54h20_cpurad.conf

sample.sysbuild.hello_world.nrf54h20dk_cpuapp_cpurad.iron:
platform_allow:
- nrf54h20dk/nrf54h20/cpuapp/iron
extra_args: SB_CONF_FILE=sysbuild/nrf54h20dk_nrf54h20_cpurad_iron.conf

sample.sysbuild.hello_world.nrf54h20dk_cpuapp_cpuppr:
platform_allow:
- nrf54h20dk/nrf54h20/cpuapp
Expand Down
Original file line number Diff line number Diff line change
@@ -0,0 +1 @@
SB_CONFIG_REMOTE_BOARD="nrf54h20dk/nrf54h20/cpurad/iron"
10 changes: 10 additions & 0 deletions soc/nordic/nrf54h/Kconfig
Original file line number Diff line number Diff line change
Expand Up @@ -7,6 +7,8 @@ config SOC_SERIES_NRF54HX
select HAS_NRFS
select HAS_NRFX
select HAS_NORDIC_DRIVERS
select SOC_EARLY_INIT_HOOK if ARM
select SOC_LATE_INIT_HOOK if SOC_NRF54H20_CPURAD_ENABLE
select NRF_PLATFORM_HALTIUM

config SOC_NRF54H20_CPUAPP_COMMON
Expand Down Expand Up @@ -63,6 +65,14 @@ config SOC_NRF54H20_CPURAD_COMMON
select HAS_PM
select HAS_POWEROFF

config SOC_NRF54H20_CPURAD_ENABLE
bool "Boot the nRF54H20 Radio core"
default y if NRF_802154_SER_HOST
help
This will at application boot time enable clock to the
Radiocore, and also power will be requested to the Radiocore
subsystem. The Radiocore will then start executing instructions.

config SOC_NRF54H20_CPURAD
select SOC_NRF54H20_CPURAD_COMMON

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26 changes: 19 additions & 7 deletions soc/nordic/nrf54h/soc.c
Original file line number Diff line number Diff line change
Expand Up @@ -21,6 +21,7 @@
#include <soc/nrfx_coredep.h>
#include <soc_lrcconf.h>
#include <dmm.h>
#include <ironside/se/cpuconf.h>

LOG_MODULE_REGISTER(soc, CONFIG_SOC_LOG_LEVEL);

Expand Down Expand Up @@ -125,7 +126,7 @@ bool z_arm_on_enter_cpu_idle(void)
}
#endif

static int nordicsemi_nrf54h_init(void)
void soc_early_init_hook(void)
{
int err;

Expand All @@ -137,9 +138,7 @@ static int nordicsemi_nrf54h_init(void)
trim_hsfll();

err = dmm_init();
if (err < 0) {
return err;
}
__ASSERT_NO_MSG(err >= 0);

#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(ccm030))
/* DMASEC is set to non-secure by default, which prevents CCM from
Expand All @@ -150,13 +149,26 @@ static int nordicsemi_nrf54h_init(void)

nrf_spu_periph_perm_dmasec_set(spu, nrf_address_slave_get(ccm030_addr), true);
#endif
}

return 0;
void soc_late_init_hook(void)
{
#if defined(CONFIG_SOC_NRF54H20_CPURAD_ENABLE)
int err;

/* The msg will be used for communication prior to IPC
* communication being set up. But at this moment no such
* communication is required.
*/
uint8_t *msg = NULL;
size_t msg_size = 0;

err = ironside_se_cpuconf_boot_radiocore(msg, msg_size);
__ASSERT_NO_MSG(err == 0);
#endif
}

void arch_busy_wait(uint32_t time_us)
{
nrfx_coredep_delay_us(time_us);
}

SYS_INIT(nordicsemi_nrf54h_init, PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
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