[nrf fromlist] soc: nordic: uicr: Move GEN_UICR options into the main…

scripts/ci/check_compliance.py

@@ -1350,39 +1350,6 @@ def check_no_undef_outside_kconfig(self, kconf):
         "FOO_LOG_LEVEL",
         "FOO_SETTING_1",
         "FOO_SETTING_2",
-        "GEN_UICR_APPROTECT_APPLICATION_PROTECTED",
-        "GEN_UICR_APPROTECT_CORESIGHT_PROTECTED",
-        "GEN_UICR_APPROTECT_RADIOCORE_PROTECTED",
-        "GEN_UICR_ERASEPROTECT",
-        "GEN_UICR_GENERATE_PERIPHCONF",
-        "GEN_UICR_LOCK",
-        "GEN_UICR_PROTECTEDMEM",
-        "GEN_UICR_PROTECTEDMEM_SIZE_BYTES",
-        "GEN_UICR_SECONDARY",
-        "GEN_UICR_SECONDARY_GENERATE_PERIPHCONF",
-        "GEN_UICR_SECONDARY_PROCESSOR_APPLICATION",
-        "GEN_UICR_SECONDARY_PROCESSOR_RADIOCORE",
-        "GEN_UICR_SECONDARY_PROCESSOR_VALUE",
-        "GEN_UICR_SECONDARY_PROTECTEDMEM",
-        "GEN_UICR_SECONDARY_PROTECTEDMEM_SIZE_BYTES",
-        "GEN_UICR_SECONDARY_TRIGGER",
-        "GEN_UICR_SECONDARY_TRIGGER_APPLICATIONLOCKUP",
-        "GEN_UICR_SECONDARY_TRIGGER_APPLICATIONWDT0",
-        "GEN_UICR_SECONDARY_TRIGGER_APPLICATIONWDT1",
-        "GEN_UICR_SECONDARY_TRIGGER_RADIOCORELOCKUP",
-        "GEN_UICR_SECONDARY_TRIGGER_RADIOCOREWDT0",
-        "GEN_UICR_SECONDARY_TRIGGER_RADIOCOREWDT1",
-        "GEN_UICR_SECONDARY_WDTSTART",
-        "GEN_UICR_SECONDARY_WDTSTART_CRV",
-        "GEN_UICR_SECONDARY_WDTSTART_INSTANCE_CODE",
-        "GEN_UICR_SECONDARY_WDTSTART_INSTANCE_WDT0",
-        "GEN_UICR_SECONDARY_WDTSTART_INSTANCE_WDT1",
-        "GEN_UICR_SECURESTORAGE",
-        "GEN_UICR_WDTSTART",
-        "GEN_UICR_WDTSTART_CRV",
-        "GEN_UICR_WDTSTART_INSTANCE_CODE",
-        "GEN_UICR_WDTSTART_INSTANCE_WDT0",
-        "GEN_UICR_WDTSTART_INSTANCE_WDT1",
         "HEAP_MEM_POOL_ADD_SIZE_", # Used as an option matching prefix
         "HUGETLBFS",          # Linux, in boards/xtensa/intel_adsp_cavs25/doc
         "IAR_BUFFERED_WRITE",

soc/nordic/common/uicr/Kconfig

@@ -25,3 +25,14 @@ config IS_IRONSIDE_SE_SECONDARY_IMAGE
 	  This Kconfig is set by sysbuild to indicate that this image is a
 	  secondary firmware for Ironside SE. This is used by the UICR generation
 	  system to determine which PERIPHCONF partition to use.
+
+config IS_GEN_UICR_IMAGE
+	bool "UICR generator image indicator (informative only, do not change)"
+	help
+	  This Kconfig is automatically set when building the gen_uicr image.
+	  It indicates that this is the UICR generator utility image and enables
+	  the UICR generator configuration options.
+
+# Source UICR generator options when building the gen_uicr image
+# All options are disabled by default unless IS_GEN_UICR_IMAGE is set
+rsource "Kconfig.gen_uicr"

soc/nordic/common/uicr/gen_uicr/Kconfig → soc/nordic/common/uicr/Kconfig.gen_uicr

@@ -2,6 +2,7 @@
 # SPDX-License-Identifier: Apache-2.0
 
 menu "UICR generator options"
+	depends on IS_GEN_UICR_IMAGE
 
 config GEN_UICR_GENERATE_PERIPHCONF
 	bool "Generate PERIPHCONF hex alongside UICR"
@@ -11,7 +12,7 @@ config GEN_UICR_GENERATE_PERIPHCONF
 	  periphconf_partition partition.
 
 config GEN_UICR_SECURESTORAGE
-	bool "Enable UICR.SECURESTORAGE"
+	bool "UICR.SECURESTORAGE"
 	default y
 	depends on $(dt_nodelabel_enabled,secure_storage_partition)
 	help
@@ -33,7 +34,7 @@ config GEN_UICR_SECURESTORAGE
 	  - Combined subpartition sizes must equal secure_storage_partition size
 
 config GEN_UICR_LOCK
-	bool "Enable UICR.LOCK"
+	bool "UICR.LOCK"
 	help
 	  When enabled, locks the entire contents of the NVR0 page located in
 	  MRAM10. This includes all values in both the UICR and the BICR (Board
@@ -44,7 +45,7 @@ config GEN_UICR_LOCK
 	  unauthorized modification.
 
 config GEN_UICR_ERASEPROTECT
-	bool "Enable UICR.ERASEPROTECT"
+	bool "UICR.ERASEPROTECT"
 	depends on ! GEN_UICR_LOCK
 	help
 	  When enabled, ERASEALL operations are blocked.
@@ -80,7 +81,7 @@ config GEN_UICR_APPROTECT_CORESIGHT_PROTECTED
 endmenu
 
 config GEN_UICR_PROTECTEDMEM
-	bool "Enable UICR.PROTECTEDMEM"
+	bool "UICR.PROTECTEDMEM"
 	help
 	  When enabled, the UICR generator will configure the
 	  protected memory region.
@@ -94,7 +95,7 @@ config GEN_UICR_PROTECTEDMEM_SIZE_BYTES
 	  This value must be divisible by 4096 (4 kiB).
 
 config GEN_UICR_WDTSTART
-	bool "Enable UICR.WDTSTART"
+	bool "UICR.WDTSTART"
 	help
 	  When enabled, the UICR generator will configure an application
 	  domain watchdog timer to start automatically before the
@@ -137,7 +138,7 @@ config GEN_UICR_WDTSTART_CRV
 	  Default value 65535 creates a 2-second timeout.
 
 config GEN_UICR_SECONDARY_WDTSTART
-	bool "Enable UICR.SECONDARY.WDTSTART"
+	bool "UICR.SECONDARY.WDTSTART"
 	depends on GEN_UICR_SECONDARY
 	help
 	  When enabled, the UICR generator will configure the
@@ -181,7 +182,7 @@ config GEN_UICR_SECONDARY_WDTSTART_CRV
 	  Default value 65535 creates a 2-second timeout.
 
 config GEN_UICR_SECONDARY
-	bool "Enable UICR.SECONDARY.ENABLE"
+	bool "UICR.SECONDARY.ENABLE"
 
 if GEN_UICR_SECONDARY
 
@@ -216,7 +217,7 @@ config GEN_UICR_SECONDARY_PROCESSOR_VALUE
 	default 0x1730C77F if GEN_UICR_SECONDARY_PROCESSOR_RADIOCORE
 
 config GEN_UICR_SECONDARY_TRIGGER
-	bool "Enable UICR.SECONDARY.TRIGGER"
+	bool "UICR.SECONDARY.TRIGGER"
 	help
 	  When enabled, configures automatic triggers that cause IronSide SE
 	  to boot the secondary firmware instead of the primary firmware based
@@ -257,7 +258,7 @@ config GEN_UICR_SECONDARY_TRIGGER_RADIOCORELOCKUP
 endif # GEN_UICR_SECONDARY_TRIGGER
 
 config GEN_UICR_SECONDARY_PROTECTEDMEM
-	bool "Enable UICR.SECONDARY.PROTECTEDMEM"
+	bool "UICR.SECONDARY.PROTECTEDMEM"
 	depends on GEN_UICR_SECONDARY
 	help
 	  When enabled, the UICR generator will configure the
@@ -274,5 +275,3 @@ config GEN_UICR_SECONDARY_PROTECTEDMEM_SIZE_BYTES
 endif # GEN_UICR_SECONDARY
 
 endmenu
-
-source "Kconfig.zephyr"