arch: NPU-as-supplemental paradigm + ggml-speed CPU route + ork dispatcher (2026-07-16) Decode measurements corrected the runtime shape: (1) NPU must never be on the critical path — the partition routing loses 3x (6.42 vs 20.91 LFM; 6.13 vs 7.01 35B); fix = speculative overlay (CPU complete + NPU int8 non-blocking, deadline-combine, quality-at-CPU-speed). (2) orkpack CPU (per-expert ork_cpu_gemv) is slower than ggml fused (6.13<7.01) — route CPU ops through ggml's kernel on ork-native weights (repack at load). (3) unify via an op dispatcher routing by work-type/precision/availability. Target Qwen3.6-35B-A3B, matching full-nf4.orkpack (23.3GB) validated. Storage scheme unchanged.
architecture: engine specialization — int8 NPU-only (best-suited W8A8), int4 vast-majority CPU bulk, int5/6 CPU minority levers (ALU cost negligible vs int4 majority); coherence notes (swap-hide int8 at M=1; PPL gate on int4 majority)
architecture: bit-need routes engine — NPU=int4/int8 native, CPU=any width; only 4/8 inflate free, int5/6 ALU-priced CPU-only memory levers (no upcast), int7 skip
architecture: correct storage model — SINGLE ork-native per-channel tiered format (int8/NF4/int4), both engines/both phases read it; Q4_K is source-only (repack-hostile for NPU), CPU reads ork-native not Q4_K
architecture: revise int5->NF4 (int5 ALU-bound at M=1, NF4 free vqtbl inflate memory-bound); CPU stays Q4_K
architecture: hybrid CPU/NPU precision decode (int5 storage, NEON free inflate, sensitivity-routed, swap-hidden pipeline)