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* add ci prepare cmd

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* fix the env by clone to private env

* fix env setting

* mv the ilit to new folder, clear the output of ipy

* rm temp files

* Lqnguyen branch3 (#210)

* Add bitonic-sort sample.

* Add a note about common file in README.

Signed-off-by: Loc Nguyen <loc.q.nguyen@intel.com>

* Move 1d_HeatTransfer sample to open source GitHub.

Signed-off-by: Loc Nguyen <loc.q.nguyen@intel.com>

* Updating License file to remove date

* Adding Buffer Object approach.

* Add comment about the location of dpc_common.hpp.

* New sample: Prefix Sum.

* Remove new sample.

* New code sample PrefixSum in ParallelPatterns.

Signed-off-by: Loc Nguyen <loc.q.nguyen@intel.com>

* Integrate MPI code sample with dpc_reduce code sample.

* Update README.md

* Update main.cpp

* Integrate MPI with latest dpc_reduce for beta09.

* Update README.md

* Update main.cpp

* Update main.cpp

* Update README.md

* Update CXX to icpx and compiler option for beta09.

Signed-off-by: Loc Nguyen <loc.q.nguyen@intel.com>

* Add "export I_MPI_CXX=dpcpp" in sample.json file.

Signed-off-by: Loc Nguyen <loc.q.nguyen@intel.com>

* Update json file.

* Sync with master.

* Update bitonic-sort code sample according to the latest guideline.

Signed-off-by: Loc Nguyen <loc.q.nguyen@intel.com>

Co-authored-by: JoeOster <52936608+JoeOster@users.noreply.github.com>

* Lqnguyen branch1 (#201)

* Add bitonic-sort sample.

* Add a note about common file in README.

Signed-off-by: Loc Nguyen <loc.q.nguyen@intel.com>

* Move 1d_HeatTransfer sample to open source GitHub.

Signed-off-by: Loc Nguyen <loc.q.nguyen@intel.com>

* Updating License file to remove date

* Adding Buffer Object approach.

* Add comment about the location of dpc_common.hpp.

* New sample: Prefix Sum.

* Remove new sample.

* New code sample PrefixSum in ParallelPatterns.

Signed-off-by: Loc Nguyen <loc.q.nguyen@intel.com>

* Integrate MPI code sample with dpc_reduce code sample.

* Update README.md

* Update main.cpp

* Integrate MPI with latest dpc_reduce for beta09.

* Update README.md

* Update main.cpp

* Update main.cpp

* Update README.md

* Update CXX to icpx and compiler option for beta09.

Signed-off-by: Loc Nguyen <loc.q.nguyen@intel.com>

* Add "export I_MPI_CXX=dpcpp" in sample.json file.

Signed-off-by: Loc Nguyen <loc.q.nguyen@intel.com>

* Update json file.

* Sync with master.

* Update the PrefixSum code sample according to the latest guidelines.

Signed-off-by: Loc Nguyen <loc.q.nguyen@intel.com>

* Update based on comments from reviewer.

Signed-off-by: Loc Nguyen <loc.q.nguyen@intel.com>

* Restructure the Usage function.

Signed-off-by: Loc Nguyen <loc.q.nguyen@intel.com>

Co-authored-by: JoeOster <52936608+JoeOster@users.noreply.github.com>

* Lqnguyen branch2 (#209)

* Add bitonic-sort sample.

* Add a note about common file in README.

Signed-off-by: Loc Nguyen <loc.q.nguyen@intel.com>

* Move 1d_HeatTransfer sample to open source GitHub.

Signed-off-by: Loc Nguyen <loc.q.nguyen@intel.com>

* Updating License file to remove date

* Adding Buffer Object approach.

* Add comment about the location of dpc_common.hpp.

* New sample: Prefix Sum.

* Remove new sample.

* New code sample PrefixSum in ParallelPatterns.

Signed-off-by: Loc Nguyen <loc.q.nguyen@intel.com>

* Integrate MPI code sample with dpc_reduce code sample.

* Update README.md

* Update main.cpp

* Integrate MPI with latest dpc_reduce for beta09.

* Update README.md

* Update main.cpp

* Update main.cpp

* Update README.md

* Update CXX to icpx and compiler option for beta09.

Signed-off-by: Loc Nguyen <loc.q.nguyen@intel.com>

* Add "export I_MPI_CXX=dpcpp" in sample.json file.

Signed-off-by: Loc Nguyen <loc.q.nguyen@intel.com>

* Update json file.

* Sync with master.

* Update 1d_HeatTransfer code sample according to the new guideline.

* Add comment about dpc_common.hpp .

Signed-off-by: Loc Nguyen <loc.q.nguyen@intel.com>

Co-authored-by: JoeOster <52936608+JoeOster@users.noreply.github.com>

* namespace change for montecarlo (#208)

* Adding mandelbrot sample to the repository

Signed-off-by: vmadanan <varsha.madananth@intel.com>

* Adding changes to mandelbrot to remove libsycl-complex.so dependency

* namespace change for Monte Carlo

* Updated samples to newest coding guidelines

* Updating samples- Mandelbrot, DCT and MonteCarlo with newest coding guidelines

* Adding changes to buffer and accessor declarations (#214)

* Initial commit for iso3dfd_dpcpp code sample

Signed-off-by: Gogar, Sunny L <sunny.l.gogar@intel.com>

* Update License.txt

* Update sample.json

* Adding iso3dfd_omp_offload and changing dpc++ compile for windows to dpcpp

* Delete .nfs000000043228fc3f00000140

* Removing build directory accidently checked in

* Update sample.json

Fixing a missing comma

* Adding couple of changes as per Paul's recommendation

* Updating some variable names as per guidelines

* Moving iso3dfd_omp_offload to C++ folder

* Fixing a windows related error about missing std:: for tranform

* Adding algorithm header explicity in iso3dfd.h

* Fixing the sample.json to eliminate recent errors

* Adding changes to buffer and accessor declarations

* Update samples for beta10 release (#207)

* Update simple add sample

Signed-off-by: Maria, Moushumi <moushumi.maria@intel.com>

* Update make files

Signed-off-by: Maria, Moushumi <moushumi.maria@intel.com>

* Update fpga make file

Signed-off-by: Maria, Moushumi <moushumi.maria@intel.com>

* Add dpc_common.hpp

* Update sample.json

* Fix Makefile.win

* Update Makefile.win

* Update sample.json

* Remove dpc_common.hpp

* Update VS project file

* Update README.md

* Update sample.json

* Add stb

* Update read me file

* Initial commit

* Update License.txt

* Change location of matrix multiplication sample

* Fix matrix mul sample VS project file

* Update samples for beta10 release

* Fix for Windows

* Fix for FPGA

* Fix for FPGA

* Fix for FPGA to support both beta09 and beta10

* Add header comment

Co-authored-by: JoeOster <52936608+JoeOster@users.noreply.github.com>

* folder structures changes following saumya's request (#217)

* Beta10 GZIP performance update (#204)

* Beta10 GZIP update -- use USM for data transfer

Signed-off-by: Audrey Kertesz <audrey.kertesz@intel.com>

* Trivial change to re-trigger CI

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* Update top level README (#222)

* Update top-level README and improve format

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* Minor formatting update

Signed-off-by: Audrey Kertesz <audrey.kertesz@intel.com>

* Fix path to oneDPL for Beta10  (#224)

* initial commit of openMP example.

Signed-off-by: todd.erdner <todd.erdner@intel.com>

* Initial commit of the dpc_reduce

Signed-off-by: todd.erdner <todd.erdner@intel.com>

* added guid to sample.json

Signed-off-by: todd.erdner <todd.erdner@intel.com>

* fixed sample.json files.

Signed-off-by: todd.erdner <todd.erdner@intel.com>

* fixed the include files.  Somehow I copied a slightly old repo and it still had <chrono> and the omp_common.hpp file.  They have been removed.

Signed-off-by: todd.erdner <todd.erdner@intel.com>

* added license.txt file ran through formating tool one more time removed all calls to "std::endl" and replaced with " \n"

Signed-off-by: todd.erdner <todd.erdner@intel.com>

* renamed license.txt to License.txt

Signed-off-by: todd.erdner <todd.erdner@intel.com>

* added "ciTests" to the sample.json file.  It passed the check.

Signed-off-by: todd.erdner <todd.erdner@intel.com>

* fixed make error

Signed-off-by: todd.erdner <todd.erdner@intel.com>

* fixed sample.json

Signed-off-by: todd.erdner <todd.erdner@intel.com>

* removed "2020" from the License.txt file due to update guidelines.

Signed-off-by: todd.erdner <todd.erdner@intel.com>

* added comment regarding where you can find dpc_common in both files per Paul's comments.

Signed-off-by: todd.erdner <todd.erdner@intel.com>

* Modified names of the functions to represent what they do (ie. calc_pi_*) per suggestion from Paul.

Signed-off-by: todd.erdner <todd.erdner@intel.com>

* initial check-in to the C++ repo

Signed-off-by: todd.erdner <todd.erdner@intel.com>

* put correct comment on dpc_common.hpp

Signed-off-by: todd.erdner <todd.erdner@intel.com>

* added commenting indicating where they can find corresponding include files.

Signed-off-by: todd.erdner <todd.erdner@intel.com>

* added comment line

Signed-off-by: todd.erdner <todd.erdner@intel.com>

* removed openMP repo from DPC++ as it will be moved to C++ directory

* Update README.md

* Update README.md

* Update README.md

* Update README.md

* fixed category line in sample.json to match exact text expected.

* removing openMP from the DPC directory.  It has been moved to C++ directory.

* fixed tf_init call

Signed-off-by: todd.erdner <todd.erdner@intel.com>

* removed all calls into PSTL internal logic.  This is what was causing fails between beta08 and beta09.

Signed-off-by: todd.erdner <todd.erdner@intel.com>

* fixed env variable to run on CPU

Signed-off-by: todd.erdner <todd.erdner@intel.com>

* update Readme file to include information about setting
env variable to allocate more memory for any runs
on the cpu

Signed-off-by: todd.erdner <todd.erdner@intel.com>

* added option in Cmake file to support unnamed lambda option.   You need this to compile if the environment doesn't have this set by default.

Signed-off-by: todd.erdner <todd.erdner@intel.com>

* path to output file from compile has changed.  it no longer seems to create the src directory.

* started to remove get_access and change it to accessor name()

Signed-off-by: todd.erdner <todd.erdner@intel.com>

* fixed remaining get_access

Signed-off-by: todd.erdner <todd.erdner@intel.com>

* removed commented out old code

Signed-off-by: todd.erdner <todd.erdner@intel.com>

* Fixed path in Cmakelists.txt to suport both beta10 and beta09.  The location of the oneDPL
library changed between the two releases.

* Update CMakeLists.txt

Co-authored-by: JoeOster <52936608+JoeOster@users.noreply.github.com>

* Added new Sample (TensorFlow Multinode Training with Horovod) (#197)

* Added new Sample (TensorFlow Multinode Training with Horovod)

Signed-off-by: Shailen Sobhee <shailen.sobhee@intel.com>

* Fixed assert reported by bandit code checker tool.

Signed-off-by: Shailen Sobhee <shailen.sobhee@gmail.com>

* Fix CI issue (MPI bug) - Upload to new folder structure

Signed-off-by: Shailen Sobhee <shailen.sobhee@gmail.com>

* Minor little fix in sample.json; A comma was missing.

Signed-off-by: Shailen Sobhee <shailen.sobhee@gmail.com>

* Removed old references to old folder structure

Signed-off-by: Shailen Sobhee <shailen.sobhee@gmail.com>

* Update third_party_programs.txt (#221)

* Updating License  file to no date in the title /*
 * Copyright (c) 2020 Intel Corporation
 *
 * This program and the accompanying materials are made available under the
 * terms of the The MIT License which is available at
 * https://opensource.org/licenses/MIT.
 *
 * SPDX-License-Identifier: MIT
 */

* Update README.md

* Fix FPGA entries

* Update README.md

Updates per request of sranikonda

* Update README.md

* removing duplicate samples after transfering to dwarves folders

* Update Makefile.win

changing compiler name from "dpcpp-cl" to "dpcpp"

* Update Makefile.win

* Update Makefile.win.fpga

* Update CMakeLists.txt

* Update CMakeLists.txt

* Update CMakeLists.txt

* Update README.md

* Update README.md

* Update from Legal Approval of 10/05/2020

Co-authored-by: akertesz <67655634+akertesz@users.noreply.github.com>

* Update Buffers/Accessors according to latest coding guidelines (Matrix_multiply Advisor and VTune). (#215)

* TBB Samples Migration

Signed-off-by: root <root@dtc-nuc-03l.jf.intel.com>

* Addressing PR Change Requests

Signed-off-by: root <root@dtc-nuc-03l.jf.intel.com>

* Fill in "Purpose" Section of both README files.

Signed-off-by: root <root@dtc-nuc-03l.jf.intel.com>

* Remove binary and build files

Signed-off-by: root <root@dtc-nuc-03l.jf.intel.com>

* include dpc_common header, remove exception handler, fix json files. (all changes apply to both samples)

Signed-off-by: root <root@dtc-nuc-03l.jf.intel.com>

* include dpc_common headers, remove exception handlers (both samples)

Signed-off-by: root <root@dtc-nuc-03l.jf.intel.com>

* Fix README files, include header files for windows

* Remove namespace, end files, use "std::iota", fix README

Signed-off-by: root <root@dtc-nuc-03l.jf.intel.com>

* fix README

Signed-off-by: root <root@dtc-nuc-03l.jf.intel.com>

* Fix "matrix_multiply" samples failures on Windows.

* buffer/accessor updates for coding guidelines (matrix mul).

Co-authored-by: root <root@dtc-nuc-03l.jf.intel.com>

* oneMKL sample updates for beta10 (#213)

* Jupyter notebooks update as per the latest guidelines (#223)

* updated the simplied version of the accessors, used auto for parallel_for
index

* using vector.size() instead of the global variables as per the comments

* fixed the typo. Also check the output vector size

* Updated Readme to add the include files path for dpc_common.hpp
Updated the cpp file with the comments on dev_utilities folder

* Updated the Jupyter notebooks as per the beta10 guidelines <praveen.k.kundurthy@intel.com>

* removed sample.json as these are jupyter notebooks <praveen.k.kundurthy@intel.com>

* removed some checkpoint files that are not necessary <praveen.k.kundurthy@intel.com>

* removed unwanted files <praveen.k.kundurthy@intel.com>

* removed unwanted checkpoint files <praveen.k.kundurthy@intel.com>

* Samples: block APSP and merge SPMV (#219)

* Update simple add sample

Signed-off-by: Maria, Moushumi <moushumi.maria@intel.com>

* Update make files

Signed-off-by: Maria, Moushumi <moushumi.maria@intel.com>

* Update fpga make file

Signed-off-by: Maria, Moushumi <moushumi.maria@intel.com>

* Add dpc_common.hpp

* Update sample.json

* Fix Makefile.win

* Update Makefile.win

* Update sample.json

* Remove dpc_common.hpp

* Update VS project file

* Update README.md

* Update sample.json

* Add stb

* Update read me file

* Initial commit

* Update License.txt

* Change location of matrix multiplication sample

* Fix matrix mul sample VS project file

* Update samples for beta10 release

* Fix for Windows

* Fix for FPGA

* Fix for FPGA

* Fix for FPGA to support both beta09 and beta10

* Add header comment

* Samples: block apsp and merge spmv

* Add readme files

* Update readme file

* Update sample.json

Co-authored-by: JoeOster <52936608+JoeOster@users.noreply.github.com>

* move TF GS sample to new folder structure according to Saumya's direction (#227)

* Update sample.json (#228)

* Update simple add sample

Signed-off-by: Maria, Moushumi <moushumi.maria@intel.com>

* Update make files

Signed-off-by: Maria, Moushumi <moushumi.maria@intel.com>

* Update fpga make file

Signed-off-by: Maria, Moushumi <moushumi.maria@intel.com>

* Add dpc_common.hpp

* Update sample.json

* Fix Makefile.win

* Update Makefile.win

* Update sample.json

* Remove dpc_common.hpp

* Update VS project file

* Update README.md

* Update sample.json

* Add stb

* Update read me file

* Initial commit

* Update License.txt

* Change location of matrix multiplication sample

* Fix matrix mul sample VS project file

* Update samples for beta10 release

* Fix for Windows

* Fix for FPGA

* Fix for FPGA

* Fix for FPGA to support both beta09 and beta10

* Add header comment

* Samples: block apsp and merge spmv

* Add readme files

* Update readme file

* Update sample.json

* Update sample.json

Co-authored-by: JoeOster <52936608+JoeOster@users.noreply.github.com>

* Edit for readme and some json files (#229)

* Updating License  file to no date in the title /*
 * Copyright (c) 2020 Intel Corporation
 *
 * This program and the accompanying materials are made available under the
 * terms of the The MIT License which is available at
 * https://opensource.org/licenses/MIT.
 *
 * SPDX-License-Identifier: MIT
 */

* Update README.md

* Fix FPGA entries

* Update README.md

Updates per request of sranikonda

* Update README.md

* removing duplicate samples after transfering to dwarves folders

* Update Makefile.win

changing compiler name from "dpcpp-cl" to "dpcpp"

* Update Makefile.win

* Update Makefile.win.fpga

* Update CMakeLists.txt

* Update CMakeLists.txt

* Update CMakeLists.txt

* Update README.md

* Update README.md

* Update from Legal Approval of 10/05/2020

* Create README.md

* Add files via upload

* Update README.md

minor modifications to content, purpose and key implementation details.

* Update sample.json

aligned description with readme

* Update README.md

reshuffled parts of the purpose and implementation details and abstracted a few key concepts into better summaries.

* Update sample.json

synched description with readme.

* Update README.md

Co-authored-by: akertesz <67655634+akertesz@users.noreply.github.com>
Co-authored-by: tomlenth <tom.f.lenth@intel.com>

* Changed folder structure (#220)

* Moved model zoo sample to new directory (#216)

* moved model zoo sample to new directory

* added runipy dependency installation

* added error handling

* minor fix

* Updating buffers/accessors for TBB Samples according to coding guidelines. Update CMake files to use defaults. (#230)

* TBB Samples Migration

Signed-off-by: root <root@dtc-nuc-03l.jf.intel.com>

* Addressing PR Change Requests

Signed-off-by: root <root@dtc-nuc-03l.jf.intel.com>

* Fill in "Purpose" Section of both README files.

Signed-off-by: root <root@dtc-nuc-03l.jf.intel.com>

* Remove binary and build files

Signed-off-by: root <root@dtc-nuc-03l.jf.intel.com>

* include dpc_common header, remove exception handler, fix json files. (all changes apply to both samples)

Signed-off-by: root <root@dtc-nuc-03l.jf.intel.com>

* include dpc_common headers, remove exception handlers (both samples)

Signed-off-by: root <root@dtc-nuc-03l.jf.intel.com>

* Fix README files, include header files for windows

* Remove namespace, end files, use "std::iota", fix README

Signed-off-by: root <root@dtc-nuc-03l.jf.intel.com>

* fix README

Signed-off-by: root <root@dtc-nuc-03l.jf.intel.com>

* Fix "matrix_multiply" samples failures on Windows.

* buffer/accessor updates for coding guidelines (matrix mul).

* Update buffers/accessors for TBB Samples. Update CMake files to use defaults.

Co-authored-by: root <root@dtc-nuc-03l.jf.intel.com>

* Update oneVPL samples for Beta10 (#218)

* Add computed_tomography sample (#212)

* create

* rm wrong file

* push missed files

* add ci prepare cmd

* add sudo in env

* fix the env by clone to private env

* fix env setting

* mv the ilit to new folder, clear the output of ipy

* rm temp files

* change structure

* rebase the update

* rm .gitkeep

* update for new API and config for ilit 1.0 in golden release

* update the script to prepare running env

* optimize for CPU to fix the latency of int8 low issue

* rm unused code

* fix the latency issue by script

* correct the file name in text

* support tf2.5

* rm old folder

Co-authored-by: Zhang, Jianyu <jianyu.zhang@intel.com>
Co-authored-by: lqnguyen <loc.q.nguyen@intel.com>
Co-authored-by: JoeOster <52936608+JoeOster@users.noreply.github.com>
Co-authored-by: vmadananth <12753028+vmadananth@users.noreply.github.com>
Co-authored-by: slgogar <33332238+slgogar@users.noreply.github.com>
Co-authored-by: Moushumi <55515077+moushumi-maria@users.noreply.github.com>
Co-authored-by: Louie Tsai <louie.tsai@intel.com>
Co-authored-by: akertesz <67655634+akertesz@users.noreply.github.com>
Co-authored-by: terdner <todd.erdner@intel.com>
Co-authored-by: Shailen Sobhee <shailen.sobhee@gmail.com>
Co-authored-by: clevels <59889830+clevels@users.noreply.github.com>
Co-authored-by: root <root@dtc-nuc-03l.jf.intel.com>
Co-authored-by: petercad <48329794+petercad@users.noreply.github.com>
Co-authored-by: praveenkk123 <praveen.k.kundurthy@intel.com>
Co-authored-by: tomlenth <tom.f.lenth@intel.com>
Co-authored-by: Jing Xu <jing.xu@intel.com>
Co-authored-by: Jitendra Patil <jitendra.patil@intel.com>
Co-authored-by: Marc Valle <30421017+mav-intel@users.noreply.github.com>
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Introduction

The oneAPI samples repository provides code samples for Intel oneAPI toolkits.

We recommend checking out a specific stable release version of the repository. The version of the repository you fetch should match the version of the oneAPI compiler you are using. View available stable releases. The latest versions (2021.4.0) of code samples on the master branch are not guaranteed to be stable.

Sample Details

The oneAPI sample repository is organized as follows:

Known Issues or Limitations

On Windows Platform

  • If you are using Visual Studio 2019, Visual Studio 2019 version 16.4.0 or newer is required.
  • Windows support for the FPGA code samples is limited to the FPGA emulator and optimization reports. Compile targets for FPGA hardware are provided on Linux only. See any FPGA code sample for more details.
  • If you encounter a compilation error when building a sample program, such as the example error below, the directory path of the sample may be too long. The workaround is to move the sample to a temp directory.
    • Example error: *Error MSB6003 The specified task executable dpcpp.exe could not be run .......

Additional Resources

Contributing

See CONTRIBUTING wiki for more information.

New Code Samples

Version Introduced Sample Name Description
2021.4.0 Pub: Data Parallel C++:
Chapter 01 - Introduction
Collection of Code samples for the chapter
- Fig_1_1_hello.cpp - Hello data-parallel programming
- Fig_1_3_race.cpp - Adding a race condition to illustrate a point about being asynchronous
- Fig_1_4_lambda.cpp - Lambda function in C++ code
- Fig_1_6_functor.cpp - Function object instead of a lambda (more on this in Chapter 10)
2021.4.0 Pub: Data Parallel C++:
Chapter 02 - Where Code Executes
Collection of Code samples for the chapter
- Fig_2_2_simple_program.cpp - Simple SYCL program
- Fig_2_7_implicit_default_selector.cpp - Implicit default device selector through trivial construction of a queue
- Fig_2_9_host_selector.cpp - Selecting the host device using the host_selector class
- Fig_2_10_cpu_selector.cpp - CPU device selector example
- Fig_2_12_multiple_selectors.cpp - Example device identification output from various classes of device selectors and demonstration that device selectors can be used for cons
- Fig_2_13_gpu_plus_fpga.cpp - Creating queues to both GPU and FPGA devices
- Fig_2_15_custom_selector.cpp - Custom selector for Intel Arria FPGA device
- Fig_2_18_simple_device_code.cpp - Submission of device code
- Fig_2_22_simple_device_code_2.cpp - Submission of device code
- Fig_2_23_fallback.cpp - Fallback queue example
2021.4.0 Pub: Data Parallel C++:
Chapter 03 - Data Management
Collection of Code samples for the chapter
- Fig_3_4_usm_explicit_data_movement.cpp - USM explicit data movement
- Fig_3_5_usm_implicit_data_movement.cpp - USM implicit data movement
- Fig_3_6_buffers_and_accessors.cpp - Buffers and accessors
- Fig_3_10_in_order.cpp - In-order queue usage
- Fig_3_11_depends_on.cpp - Using events and depends_on
- Fig_3_13_read_after_write.cpp - Read-after-Write
- Fig_3_15_write_after_read_and_write_after_write.cpp - Write-after-Read and Write-after-Write
2021.4.0 Pub: Data Parallel C++:
Chapter 04 - Expresssing Parallelism
Collection of Code samples for the chapter
- Fig_4_5_vector_add.cpp - Expressing a vector addition kernel with parallel_for
- Fig_4_6_matrix_add.cpp - Expressing a matrix addition kernel with parallel_for
- Fig_4_7_basic_matrix_multiply.cpp - Expressing a naïve matrix multiplication kernel for square matrices, with parallel_for
- Fig_4_13_nd_range_matrix_multiply.cpp - Expressing a naïve matrix multiplication kernel with ND-range parallel_for
- Fig_4_20_hierarchical_matrix_multiply.cpp - Expressing a naïve matrix multiplication kernel with hierarchical parallelism
- Fig_4_22_hierarchical_logical_matrix_multiply.cpp - Expressing a naïve matrix multiplication kernel with hierarchical parallelism and a logical range
2021.4.0 Pub: Data Parallel C++:
Chapter 05 - Error Handling
Collection of Code samples for the chapter
- Fig_5_1_async_task_graph.cpp - Separation of host program and task graph executions
- Fig_5_2_sync_error.cpp - Creating a synchronous error
- Fig_5_3_async_error.cpp - Creating an asynchronous error
- Fig_5_4_unhandled_exception.cpp - Unhandled exception in C++
- Fig_5_5_terminate.cpp - std::terminate is called when a SYCL asynchronous exception isn’t handled
- Fig_5_6_catch_snip.cpp - Pattern to catch sycl::exception specifically
- Fig_5_7_catch.cpp - Pattern to catch exceptions from a block of code
- Fig_5_8_lambda_handler.cpp - Example asynchronous handler implementation defined as a lambda
- Fig_5_9_default_handler_proxy.cpp - Example of how the default asynchronous handler behaves
2021.4.0 Pub: Data Parallel C++:
Chapter 06 - Unified Shared Memory
Collection of Code samples for the chapter
- Fig_6_5_allocation_styles.cpp - Three styles for allocation
- Fig_6_6_usm_explicit_data_movement.cpp - USM explicit data movement example
- Fig_6_7_usm_implicit_data_movement.cpp - USM implicit data movement example
- Fig_6_8_prefetch_memadvise.cpp - Fine-grained control via prefetch and mem_advise
- Fig_6_9_queries.cpp - Queries on USM pointers and devices
2021.4.0 Pub: Data Parallel C++:
Chapter 07 - Buffers
Collection of Code samples for the chapter
- Fig_7_2_3_4_creating_buffers.cpp - Creating buffers, Part 1 - Figure 7-3. Creating buffers, Part 2 - Figure 7-4. Creating buffers, Part 3
- Fig_7_5_buffer_properties.cpp - Buffer properties
- Fig_7_8_accessors_simple.cpp - Simple accessor creation
- Fig_7_10_accessors.cpp - Accessor creation with specified usage
2021.4.0 Pub: Data Parallel C++:
Chapter 08 - Scheduling Kernals and Data Movement
Collection of Code samples for the chapter
- Fig_8_3_linear_dependence_in_order.cpp - Linear dependence chain with in-order queues
- Fig_8_4_linear_dependence_events.cpp - Linear dependence chain with events
- Fig_8_5_linear_dependence_buffers.cpp - Linear dependence chain with buffers and accessors
- Fig_8_6_y_in_order.cpp - Y pattern with in-order queues
- Fig_8_7_y_events.cpp - Y pattern with events
- Fig_8_8_y_buffers.cpp - Y pattern with accessors
2021.4.0 Pub: Data Parallel C++:
Chapter 09 - Communication and Synchronization
Collection of Code samples for the chapter
- Fig_9_4_naive_matrix_multiplication.cpp - The naïve matrix multiplication kernel from Chapter 4
- Fig_9_7_local_accessors.cpp - Declaring and using local accessors
- Fig_9_8_ndrange_tiled_matrix_multiplication.cpp - Expressing a tiled matrix multiplication kernel with an ND-range parallel_for and work-group local memory
- Fig_9_9_local_hierarchical.cpp - Hierarchical kernel with a local memory variable
- Fig_9_10_hierarchical_tiled_matrix_multiplication.cpp - A tiled matrix multiplication kernel implemented as a hierarchical kernel
- Fig_9_11_sub_group_barrier.cpp - Querying and using the sub_group class
- Fig_9_13_matrix_multiplication_broadcast.cpp - Matrix multiplication kernel includes a broadcast operation
- Fig_9_14_ndrange_sub_group_matrix_multiplication.cpp - Tiled matrix multiplication kernel expressed with ND-range parallel_for and sub-group collective functions
2021.4.0 Pub: Data Parallel C++:
Chapter 10 - Defining Kernels
Collection of Code samples for the chapter
- Fig_10_2_kernel_lambda.cpp - Kernel defined using a lambda expression
- Fig_10_3_optional_kernel_lambda_elements.cpp - More elements of a kernel lambda expression, including optional elements
- Fig_10_4_named_kernel_lambda.cpp - Naming kernel lambda expressions
- Fig_10_5_unnamed_kernel_lambda.cpp - Using unnamed kernel lambda expressions
- Fig_10_6_kernel_functor.cpp - Kernel as a named function object
- Fig_10_7_opencl_source_interop.cpp - Kernel created from OpenCL C kernel source
- Fig_10_8_opencl_object_interop.cpp - Kernel created from an OpenCL kernel object
- Fig_10_9_kernel_lambda_build_options.cpp - Compiling kernel lambdas with build options
2021.4.0 Pub: Data Parallel C++:
Chapter 11 - Vectors
Collection of Code samples for the chapter
- Fig_11_6_load_store.cpp - Use of load and store member functions.
- Fig_11_7_swizzle_vec.cpp - Example of using the swizzled_vec class
- Fig_11_8_vector_exec.cpp - Vector execution example
2021.4.0 Pub: Data Parallel C++:
Chapter 12 - Device Information
Collection of Code samples for the chapter
- Fig_12_1_assigned_device.cpp - Device we have been assigned by default
- Fig_12_2_try_catch.cpp - Using try-catch to select a GPU device if possible, host device if not
- Fig_12_3_device_selector.cpp - Custom device selector—our preferred solution
- Fig_12_4_curious.cpp - Simple use of device query mechanisms: curious.cpp
- Fig_12_6_very_curious.cpp - More detailed use of device query mechanisms: verycurious.cpp
- Fig_12_7_invocation_parameters.cpp - Fetching parameters that can be used to shape a kernel
2021.4.0 Pub: Data Parallel C++:
Chapter 13 - Practical Tips
Collection of Code samples for the chapter
- Fig_13_4_stream.cpp - sycl::stream
- Fig_13_6_common_buffer_pattern.cpp - Common pattern—buffer creation from a host allocation
- Fig_13_7_common_pattern_bug.cpp - Common bug: Reading data directly from host allocation during buffer lifetime
- Fig_13_8_host_accessor.cpp - Recommendation: Use a host accessor to read kernel result
- Fig_13_9_host_accessor_for_init.cpp - Recommendation: Use host accessors for buffer initialization and reading of results
- Fig_13_10_host_accessor_deadlock.cpp - Bug (hang!) from improper use of host_accessors
2021.4.0 Pub: Data Parallel C++:
Chapter 14 - Common Parallel Patterns
Collection of Code samples for the chapter
- Fig_14_8_one_reduction.cpp - Reduction expressed as an ND-range data-parallel kernel using the reduction library
- Fig_14_11_user_defined_reduction.cpp - Using a user-defined reduction to find the location of the minimum value with an ND-range kernel
- Fig_14_13_map.cpp - Implementing the map pattern in a data-parallel kernel
- Fig_14_14_stencil.cpp - Implementing the stencil pattern in a data-parallel kernel
- Fig_14_15_local_stencil.cpp - Implementing the stencil pattern in an ND-range kernel, using work-group local memory
- Fig_14_18-20_inclusive_scan.cpp - Implementing a naïve reduction expressed as a data-parallel kernel
- Fig_14_22_local_pack.cpp - Using a sub-group pack operation to build a list of elements needing additional postprocessing
- Fig_14_24_local_unpack.cpp - Using a sub-group unpack operation to improve load balancing for kernels with divergent control flow
2021.4.0 Pub: Data Parallel C++:
Chapter 15 - Programming for GPUs
Collection of Code samples for the chapter
- Fig_15_3_single_task_matrix_multiplication.cpp - A single task matrix multiplication looks a lot like CPU host code
- Fig_15_5_somewhat_parallel_matrix_multiplication.cpp - Somewhat-parallel matrix multiplication
- Fig_15_7_more_parallel_matrix_multiplication.cpp - Even more parallel matrix multiplication
- Fig_15_10_divergent_control_flow.cpp - Kernel with divergent control flow
- Fig_15_12_small_work_group_matrix_multiplication.cpp - Inefficient single-item, somewhat-parallel matrix multiplication
- Fig_15_18_columns_matrix_multiplication.cpp - Computing columns of the result matrix in parallel, not rows
2021.4.0 Pub: Data Parallel C++:
Chapter 16 - Programming for CPUs
Collection of Code samples for the chapter
- Fig_16_6_stream_triad.cpp - DPC++ STREAM Triad parallel_for kernel code
- Fig_16_12_forward_dep.cpp - Using a sub-group to vectorize a loop with a forward dependence
- Fig_16_18_vector_swizzle.cpp - Using vector types and swizzle operations in the single_task kernel
2021.4.0 Pub: Data Parallel C++:
Chapter 17 - Programming for FPGA
Collection of Code samples for the chapter
- Fig_17_9_fpga_selector.cpp - Choosing an FPGA device at runtime using the
- Fig_17_11_fpga_emulator_selector.cpp - Using fpga_emulator_selector for rapid development and debugging
- Fig_17_17_ndrange_func.cpp - Multiple work-item (16 × 16 × 16) invocation of a random number generator
- Fig_17_18_loop_func.cpp - Loop-carried data dependence (state)
- Fig_17_20_loop_carried_deps.cpp - Loop with two loop-carried dependences (i.e., i and a)
- Fig_17_22_loop_carried_state.cpp - Random number generator that depends on previous value generated
- Fig_17_31_inter_kernel_pipe.cpp - Pipe between two kernels: (1) ND-range and (2) single task with a loop
2021.4.0 Pub: Data Parallel C++:
Chapter 18 - Libraries
Collection of Code samples for the chapter
- Fig_18_1_builtin.cpp - Using std::log and sycl::log
- Fig_18_7_swap.cpp - Using std::swap in device code
- Fig_18_11_std_fill.cpp - Using std::fill
- Fig_18_13_binary_search.cpp - Using binary_search
- Fig_18_15_pstl_usm.cpp - Using Parallel STL with a USM allocator Errata - code samples for 18-10, 18-12, 18-14, and 19-17 are not in the repository
2021.4.0 Pub: Data Parallel C++:
Chapter 19 - Memory Model and Atomics
Collection of Code samples for the chapter
- Fig_19_3_data_race.cpp - Kernel containing a data race
- Fig_19_6_avoid_data_race_with_barrier.cpp - Avoiding a data race using a barrier
- Fig_19_7_avoid_data_race_with_atomics.cpp - Avoiding a data race using atomic operations
- Fig_19_15_buffer_and_atomic_ref.cpp - Accessing a buffer via an explicitly created atomic_ref
- Fig_19_16_atomic_accessor.cpp - Accessing a buffer via an atomic_ref implicitly created by an atomic accessor
- Fig_19_18_histogram.cpp - Computing a histogram using atomic references in different memory spaces
- Fig_19_19-20_device_latch.cpp - Combining Figure 19-20. Using and building a simple device-wide latch on top of atomic references Errata - code samples for 18-10, 18-12, 18-14, and 19-17 are not in the repository
2021.4.0 Pub: Data Parallel C++:
Chapter 20 - Epilogue Future Direction
Collection of Code samples for the chapterEpilogue source code examples: Future Direction of DPC++
- Fig_ep_1_mdspan.cpp - Attaching accessor-like indexing to a USM pointer using mdspan
- Fig_ep_2-4_generic_space.cpp - Storing pointers to a specific address space in a class - Figure EP-3. Storing pointers to the generic address space in a class - Figure EP-4. Storing pointers with an optional address space in a class
- Fig_ep_5_extension_mechanism.cpp - Checking for Intel sub-group extension compiler support with #ifdef
- Fig_ep_6_device_constexpr.cpp - Specializing kernel code based on device aspects at kernel compile time
- Fig_ep_7_hierarchical_reduction.cpp - Using hierarchical parallelism for a hierarchical reduction
2021.4.0 Intel® Python Scikit-learn Extension Getting Started This sample illustrates how to do Image classification using SVM classifier from Python API package SKlearnex with the use of Intel® oneAPI Data Analytics Library (oneDAL).
2021.4.0 Merge Sort A Reference design demonstrating merge sort on an Intel® FPGA
2021.4.0 Private Copies An Intel® FPGA tutorial demonstrating how to use the private_copies attribute to trade off the resource use and the throughput of a DPC++ FPGA program
2021.4.0 Stall Enable An Intel® FPGA tutorial demonstrating the use_stall_enable_clusters attribute

Total Samples: 158

License

Code samples are licensed under the MIT license. See License.txt for details.

Third-party program Licenses can be found here: third-party-programs.txt

Report Generated on: September 09, 2021