opal/timer: add code to check if rtdtsc is core invariant #2599
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Newer x86 processors have a core invariant tsc. On these systems it is safe to use the rtdtsc instruction as a monotonic timer. This commit adds a new function to the opal timer code to check if the timer backend is monotonic. On x86 it checks the appropriate bit and on other architectures it parrots back the OPAL_TIMER_MONOTONIC value. (cherry picked from commit a718743) Signed-off-by: Nathan Hjelm <hjelmn@lanl.gov>
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@rhc54 This fixes as performance regression found in 1.10.3 that is cause LANL codes problems. The fix doesn't help with all Intel processors but helps with the latest iterations. I am working on a more complete fix but we need a 1.10.5 on Monday or Tuesday if possible. |
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can you get someone to review this by then? |
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@rhc54 Sure. If George can't get to it I will see who I can find. |
bosilca
approved these changes
Dec 19, 2016
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Fixes #2591 |
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Newer x86 processors have a core invariant tsc. On these systems it is
safe to use the rtdtsc instruction as a monotonic timer. This commit
adds a new function to the opal timer code to check if the timer
backend is monotonic. On x86 it checks the appropriate bit and on
other architectures it parrots back the OPAL_TIMER_MONOTONIC value.
(cherry picked from commit a718743)
Signed-off-by: Nathan Hjelm hjelmn@lanl.gov