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ibmthi
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dcrowell77
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XB301316: NAPLES: OCC reset procedure needs to account for WOF gating special w
Change-Id: Iad18fa86c8b50acf505f40ad82f4ae5520f792c0 CQ:XB301316 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24283 Tested-by: Jenkins Server Reviewed-by: Thi N. Tran <thi@us.ibm.com> Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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‎src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_prep_for_reset.C‎

Lines changed: 113 additions & 100 deletions
Original file line numberDiff line numberDiff line change
@@ -5,7 +5,7 @@
55
/* */
66
/* OpenPOWER HostBoot Project */
77
/* */
8-
/* Contributors Listed Below - COPYRIGHT 2013,2015 */
8+
/* Contributors Listed Below - COPYRIGHT 2013,2016 */
99
/* [+] International Business Machines Corp. */
1010
/* */
1111
/* */
@@ -22,7 +22,7 @@
2222
/* permissions and limitations under the License. */
2323
/* */
2424
/* IBM_PROLOG_END_TAG */
25-
// $Id: p8_pm_prep_for_reset.C,v 1.31 2015/05/13 03:12:36 stillgs Exp $
25+
// $Id: p8_pm_prep_for_reset.C,v 1.32 2016/04/29 14:00:41 stillgs Exp $
2626
// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_pm_prep_for_reset.C,v $
2727
//------------------------------------------------------------------------------
2828
// *! (C) Copyright International Business Machines Corp. 2011
@@ -198,6 +198,112 @@ p8_pm_prep_for_reset( const fapi::Target &i_primary_chip_target,
198198
{
199199
FAPI_INF("Running on DCM");
200200
}
201+
202+
// XB301316 - Start
203+
// Moving OCC Heartbeat and OCC Halt here to stop WOF from modifying the
204+
// PDEMR and keeping Special Wake-up from happening
205+
206+
// ******************************************************************
207+
// Disable PMC OCC HEARTBEAT before reset OCC
208+
// ******************************************************************
209+
// Primary
210+
rc = fapiGetScom(i_primary_chip_target, PMC_OCC_HEARTBEAT_REG_0x00062066 , data );
211+
if (rc)
212+
{
213+
FAPI_ERR("fapiGetScom(PMC_OCC_HEARTBEAT_REG_0x00062066) failed.");
214+
break;
215+
}
216+
217+
e_rc = data.clearBit(16);
218+
if (e_rc)
219+
{
220+
FAPI_ERR("ecmdDataBufferBase error setting up PMC_OCC_HEARTBEAT_REG_0x00062066 on master during reset");
221+
rc.setEcmdError(e_rc);
222+
break;
223+
}
224+
225+
rc = fapiPutScom(i_primary_chip_target, PMC_OCC_HEARTBEAT_REG_0x00062066 , data );
226+
if (rc)
227+
{
228+
FAPI_ERR("fapiPutScom(PMC_OCC_HEARTBEAT_REG_0x00062066) failed.");
229+
break;
230+
}
231+
232+
// Secondary
233+
if ( i_secondary_chip_target.getType() != TARGET_TYPE_NONE )
234+
{
235+
rc = fapiGetScom(i_secondary_chip_target, PMC_OCC_HEARTBEAT_REG_0x00062066 , data );
236+
if (rc)
237+
{
238+
FAPI_ERR("fapiGetScom(PMC_OCC_HEARTBEAT_REG_0x00062066) failed.");
239+
break;
240+
}
241+
242+
e_rc = data.clearBit(16);
243+
if (e_rc)
244+
{
245+
FAPI_ERR("ecmdDataBufferBase error setting up PMC_OCC_HEARTBEAT_REG_0x00062066 on slave during reset");
246+
rc.setEcmdError(e_rc);
247+
break;
248+
}
249+
250+
rc = fapiPutScom(i_secondary_chip_target, PMC_OCC_HEARTBEAT_REG_0x00062066 , data );
251+
if (rc)
252+
{
253+
FAPI_ERR("fapiPutScom(PMC_OCC_HEARTBEAT_REG_0x00062066) failed.");
254+
break;
255+
}
256+
}
257+
258+
// ******************************************************************
259+
// Put OCC PPC405 into reset safely
260+
// ******************************************************************
261+
FAPI_INF("Put OCC PPC405 into reset safely");
262+
FAPI_DBG("Executing: p8_occ_control.C");
263+
264+
FAPI_EXEC_HWP(rc, p8_occ_control, i_primary_chip_target, PPC405_RESET_SEQUENCE, 0);
265+
if (rc)
266+
{
267+
FAPI_ERR("p8_occ_control: Failed to prepare OCC for RESET. With rc = 0x%x", (uint32_t)rc);
268+
break;
269+
}
270+
271+
if ( i_secondary_chip_target.getType() != TARGET_TYPE_NONE )
272+
{
273+
FAPI_EXEC_HWP(rc, p8_occ_control, i_secondary_chip_target, PPC405_RESET_SEQUENCE, 0);
274+
if (rc)
275+
{
276+
FAPI_ERR("p8_occ_control: Failed to prepare OCC for RESET. With rc = 0x%x", (uint32_t)rc);
277+
break;
278+
}
279+
}
280+
281+
// ******************************************************************
282+
// Issue reset to PORE General Purpose Engine
283+
// ******************************************************************
284+
FAPI_INF("Issue reset to PORE General Purpose Engine");
285+
FAPI_DBG("Executing: p8_poregpe_init.C");
286+
287+
// Primary
288+
FAPI_EXEC_HWP(rc, p8_poregpe_init, i_primary_chip_target, PM_RESET, GPEALL );
289+
if (rc)
290+
{
291+
FAPI_ERR("p8_poregpe_init: Failed to issue reset to PORE General Purpose Engine. With rc = 0x%x", (uint32_t)rc);
292+
break;
293+
}
294+
295+
// Secondary
296+
if ( i_secondary_chip_target.getType() != TARGET_TYPE_NONE )
297+
{
298+
FAPI_EXEC_HWP(rc, p8_poregpe_init, i_secondary_chip_target, PM_RESET, GPEALL );
299+
if (rc)
300+
{
301+
FAPI_ERR("p8_poregpe_init: Failed to issue reset to PORE General Purpose Engine. With rc = 0x%x", (uint32_t)rc);
302+
break;
303+
}
304+
}
305+
306+
// XB301316 - End
201307

202308
// ******************************************************************
203309
// Clear the Deep Exit Masks to allow Special Wake-up to occur
@@ -318,81 +424,10 @@ p8_pm_prep_for_reset( const fapi::Target &i_primary_chip_target,
318424
{
319425
break;
320426
}
427+
428+
// XB301316
429+
// OCC heartbeat disable and OCC Halt was here
321430

322-
// ******************************************************************
323-
// Disable PMC OCC HEARTBEAT before reset OCC
324-
// ******************************************************************
325-
// Primary
326-
rc = fapiGetScom(i_primary_chip_target, PMC_OCC_HEARTBEAT_REG_0x00062066 , data );
327-
if (rc)
328-
{
329-
FAPI_ERR("fapiGetScom(PMC_OCC_HEARTBEAT_REG_0x00062066) failed.");
330-
break;
331-
}
332-
333-
e_rc = data.clearBit(16);
334-
if (e_rc)
335-
{
336-
FAPI_ERR("ecmdDataBufferBase error setting up PMC_OCC_HEARTBEAT_REG_0x00062066 on master during reset");
337-
rc.setEcmdError(e_rc);
338-
break;
339-
}
340-
341-
rc = fapiPutScom(i_primary_chip_target, PMC_OCC_HEARTBEAT_REG_0x00062066 , data );
342-
if (rc)
343-
{
344-
FAPI_ERR("fapiPutScom(PMC_OCC_HEARTBEAT_REG_0x00062066) failed.");
345-
break;
346-
}
347-
348-
// Secondary
349-
if ( i_secondary_chip_target.getType() != TARGET_TYPE_NONE )
350-
{
351-
rc = fapiGetScom(i_secondary_chip_target, PMC_OCC_HEARTBEAT_REG_0x00062066 , data );
352-
if (rc)
353-
{
354-
FAPI_ERR("fapiGetScom(PMC_OCC_HEARTBEAT_REG_0x00062066) failed.");
355-
break;
356-
}
357-
358-
e_rc = data.clearBit(16);
359-
if (e_rc)
360-
{
361-
FAPI_ERR("ecmdDataBufferBase error setting up PMC_OCC_HEARTBEAT_REG_0x00062066 on slave during reset");
362-
rc.setEcmdError(e_rc);
363-
break;
364-
}
365-
366-
rc = fapiPutScom(i_secondary_chip_target, PMC_OCC_HEARTBEAT_REG_0x00062066 , data );
367-
if (rc)
368-
{
369-
FAPI_ERR("fapiPutScom(PMC_OCC_HEARTBEAT_REG_0x00062066) failed.");
370-
break;
371-
}
372-
}
373-
374-
// ******************************************************************
375-
// Put OCC PPC405 into reset safely
376-
// ******************************************************************
377-
FAPI_INF("Put OCC PPC405 into reset safely");
378-
FAPI_DBG("Executing: p8_occ_control.C");
379-
380-
FAPI_EXEC_HWP(rc, p8_occ_control, i_primary_chip_target, PPC405_RESET_SEQUENCE, 0);
381-
if (rc)
382-
{
383-
FAPI_ERR("p8_occ_control: Failed to prepare OCC for RESET. With rc = 0x%x", (uint32_t)rc);
384-
break;
385-
}
386-
387-
if ( i_secondary_chip_target.getType() != TARGET_TYPE_NONE )
388-
{
389-
FAPI_EXEC_HWP(rc, p8_occ_control, i_secondary_chip_target, PPC405_RESET_SEQUENCE, 0);
390-
if (rc)
391-
{
392-
FAPI_ERR("p8_occ_control: Failed to prepare OCC for RESET. With rc = 0x%x", (uint32_t)rc);
393-
break;
394-
}
395-
}
396431

397432
// ******************************************************************
398433
// FSM trace
@@ -614,30 +649,8 @@ p8_pm_prep_for_reset( const fapi::Target &i_primary_chip_target,
614649
}
615650
}
616651

617-
// ******************************************************************
618-
// Issue reset to PORE General Purpose Engine
619-
// ******************************************************************
620-
FAPI_INF("Issue reset to PORE General Purpose Engine");
621-
FAPI_DBG("Executing: p8_poregpe_init.C");
622-
623-
// Primary
624-
FAPI_EXEC_HWP(rc, p8_poregpe_init, i_primary_chip_target, PM_RESET, GPEALL );
625-
if (rc)
626-
{
627-
FAPI_ERR("p8_poregpe_init: Failed to issue reset to PORE General Purpose Engine. With rc = 0x%x", (uint32_t)rc);
628-
break;
629-
}
630-
631-
// Secondary
632-
if ( i_secondary_chip_target.getType() != TARGET_TYPE_NONE )
633-
{
634-
FAPI_EXEC_HWP(rc, p8_poregpe_init, i_secondary_chip_target, PM_RESET, GPEALL );
635-
if (rc)
636-
{
637-
FAPI_ERR("p8_poregpe_init: Failed to issue reset to PORE General Purpose Engine. With rc = 0x%x", (uint32_t)rc);
638-
break;
639-
}
640-
}
652+
// SWxxxxxx
653+
// PORE General Purpose Engine reset was here
641654

642655
// ******************************************************************
643656
// Issue reset to PBA

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