feat: rv64 loadstore#2714
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@claude can you review the loadstore chip changes, specifically whether the encoder subair is used correctly |
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Claude finished @shuklaayush's task in 3m 52s —— View job Reviewing loadstore chip changes (encoder subair focus)
Review: Encoder SubAir Usage in LoadStore ChipOverall: The encoder subair is used correctly. The integration is sound and the constraint logic is well-structured. Here are the details: Encoder Construction ✅// core.rs:169-177
fn loadstore_encoder() -> Encoder {
Encoder::new(LOADSTORE_SELECTOR_CASES, LOADSTORE_SELECTOR_MAX_DEGREE, true)
// 30 flags, max_degree=2, reserve_invalid=true
}
Constraint Application ✅// core.rs:255
self.encoder.eval(builder, &selector);This applies 3 constraint families from the encoder:
Flag Extraction & Derived Columns ✅// core.rs:257-272
let selector_flags = self.encoder.flags::<AB>(&selector); // 30 expressions, each degree 2
let expected_is_valid = selector_flags.iter().fold(...); // sum of flags = 0 or 1
let expected_is_load = /* sum of load-case flags */;
builder.assert_eq(is_valid, expected_is_valid);
builder.assert_eq(is_load, expected_is_load);
Shift Amount Splitting ✅// core.rs:282-301
let load_shift_amount = /* sum of flag * shift for load cases */;
let store_shift_amount = /* sum of flag * shift for store cases */;These are degree 2 (flag expr × constant). Keeping them separate avoids the degree-3 blowup that would occur if a single write_data Constraints ✅// core.rs:303-324
for (i, cell) in write_data.iter().enumerate() {
let expected = InstructionCase::ALL.iter().fold(..., |acc, &case| {
acc + selector_flags[case as usize].clone() * term // degree 2 × degree 1 = degree 3
});
builder.assert_eq(*cell, expected);
}Max constraint degree = 3, matching the encoder's own constraint degree. ✅ Trace Filling ✅// core.rs:454-455
core_row.selector = selector_point_for_opcode_shift(opcode, shift).map(F::from_canonical_u32);Uses InstructionCase Enum ✅The enum covers exactly the 30 valid Minor Observations
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shuklaayush
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couple of nits. i didn't thoroughly review the constraints. we can do that later
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@claude can you apply the suggestions |
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Claude finished @shuklaayush's task in 4m 38s —— View job Applying review suggestions
Applied both review suggestions in
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- Add `encoder: Encoder` field to `LoadStoreFiller` to avoid recreating the encoder on every `fill_trace_row` call - Use `self.encoder.is_valid()` instead of manually summing all selector flags to compute `expected_is_valid` Co-authored-by: Ayush Shukla <shuklaayush@users.noreply.github.com> Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
Resolves INT-7500. Summary: - `loadstore` submodule of `riscv` has been ported from RV32 to RV64 - All types/structs renamed from `Rv32*` to `Rv64*` (e.g., `Rv32LoadStoreAdapterAir` → `Rv64LoadStoreAdapterAir`) - Operand width changed from `u32`/4 bytes to `u64`/8 bytes throughout (`RV32_REGISTER_NUM_LIMBS` → `RV64_REGISTER_NUM_LIMBS`, `RV32_*_AS` → `RV64_*_AS`, `rs1_val: u32` → `u64`) + loadstore now handles the `LOADD`, `LOADWU`, and `STORED` opcodes - `Rv64LoadStoreAdapter` updated for RV64 - New constraint added: upper 4 bytes of `rs1_data` must be zero, since this adapter only supports 32-bit memory addresses - `LoadStoreCoreAir` rewritten to use the `Encoder` primitive in place of the ad-hoc `flags: [T; 4]` scheme, since the 30 valid `(opcode, shift)` pairs no longer fit in the old encoding - New `InstructionCase` enum enumerates all 30 cases; `selector: [T; 7]` replaces `flags: [T; 4]` --------- Co-authored-by: claude[bot] <41898282+claude[bot]@users.noreply.github.com> Co-authored-by: Ayush Shukla <shuklaayush@users.noreply.github.com> Co-authored-by: Claude Opus 4.6 <noreply@anthropic.com>
Resolves INT-7500.
Summary:
loadstoresubmodule ofriscvhas been ported from RV32 to RV64Rv32*toRv64*(e.g.,Rv32LoadStoreAdapterAir→Rv64LoadStoreAdapterAir)u32/4 bytes tou64/8 bytes throughout (RV32_REGISTER_NUM_LIMBS→RV64_REGISTER_NUM_LIMBS,RV32_*_AS→RV64_*_AS,rs1_val: u32→u64) + loadstore now handles theLOADD,LOADWU, andSTOREDopcodesRv64LoadStoreAdapterupdated for RV64rs1_datamust be zero, since this adapter only supports 32-bit memory addressesLoadStoreCoreAirrewritten to use theEncoderprimitive in place of the ad-hocflags: [T; 4]scheme, since the 30 valid(opcode, shift)pairs no longer fit in the old encodingInstructionCaseenum enumerates all 30 cases;selector: [T; 7]replacesflags: [T; 4]