kernel: rtl8261n: Always configure as USXGMII#23076
kernel: rtl8261n: Always configure as USXGMII#23076openwrt-bot merged 3 commits intoopenwrt:mainfrom
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@jonasjelonek Can you please double check this PR? Not that I've messed something up. You have much more knowledge in this field. |
jonasjelonek
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Let's see how many additional IRQ comments it'll take until the other PR is in so the old driver can be dropped ...
Otherwise good, also just tested this on my Realtek switch with RTL8261 and it works.
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jonasjelonek
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Thank you. Tested on (yet unsupported) SKS7300-4X4T with RTL8261N
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Please reword the first commit message. Some clumsy sentences there. |
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And another nit. In the last commit ther is a ":" missing
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Reworded it - will stop for now because I think I've ended up in a loop of rewording-only pushes. |
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@robimarko good to go. Thanks in advance. |
The PHY register patch in question is gated by `CONFIG_MACH_REALTEK_RTL`, has no documented/expected behavior, and is in practice unreachable: `phy_patch()` is only called from `rtkphy_config_init()`, which is exits (too) early for `CONFIG_MACH_REALTEK_RTL` builds. Remove it as a cleanup step before enabling standard USXGMII configuration for these PHYs. Fixes: b77fa45 ("kernel: fix rtl8261n driver for realtek") Co-authored-by: Jonas Jelonek <jelonek.jonas@gmail.com> Signed-off-by: Sven Eckelmann <sven@narfation.org> Link: openwrt#23076 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
In the past, all the configuration of SerDes and PHYs on the realtek switches were done using u-boot (`rtk init`). But since RTL930x switched to SerDes configuration under Linux, the SoC side is no longer using the Realtek-proprietary variant of USXGMII. The communication to the RTL8261N PHYs on those switches broke because of this incompatibility. Enabling the full initialization on `CONFIG_MACH_REALTEK_RTL` converts also the PHY side to the standard USXGMII and therefore ensures that both sides speak the same dialect. Co-authored-by: Jonas Jelonek <jelonek.jonas@gmail.com> Signed-off-by: Sven Eckelmann <sven@narfation.org> Link: openwrt#23076 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
After the RTL8261N asserts a reset, the MDIO bus becomes temporarily unavailable during the chip's reinitialization sequence. Any subsequent read or write issued before the PHY has stabilized will fail. Add a 30ms delay after triggering the reset to ensure the chip is reachable via MDIO before resuming communication. Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com> Signed-off-by: Sven Eckelmann <sven@narfation.org> Link: openwrt#23076 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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In the past, all the configuration of SerDes and PHYs on the realtek switches were done using u-boot (
rtk init). But since RTL930x switched to SerDes configuration under Linux, the SoC side is no longer using the Realtek-proprietary variant of USXGMII. The communication to the RTL8261N PHYs on those switches broke because of this incompatibility.Enabling the full initialization on
CONFIG_MACH_REALTEK_RTLconverts also the PHY side to the standard USXGMII and therefore ensures that both sides speak the same dialect.In this process, also an undocumented
CONFIG_MACH_REALTEK_RTLonly patch needs to be removed. It was never actually reached before. Simply, becausertkphy_config_init()returned onCONFIG_MACH_REALTEK_RTLswitches before the PHY patching was reached. But it also seems to be wrong to apply it now. The SerDes<->PHY communication should use the standard USXGMII and not some proprietary Realtek variant.This was mostly extracted from a discussion with @jonasjelonek (#22563 (comment))