Update Bender.yml #7
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Co-authored-by: Jannis Schönleber <joennlae@gmail.com> Signed-off-by: Nils Wistoff <nwistoff@iis.ee.ethz.ch>
niwis
commented
Feb 13, 2023
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| register_interface: { git: "git@github.com:pulp-platform/register_interface.git", version: 0.3.3 } | ||
| axi: { git: "git@github.com:pulp-platform/axi.git", version: 0.37.0 } | ||
| axi_riscv_atomics: { git: "git@github.com:pulp-platform/axi_riscv_atomics.git", version: 0.5.0 } | ||
| tech_cells_generic: { git: "git@github.com:pulp-platform/tech_cells_generic.git", version: 0.2.9 } | ||
| riscv-dbg: { git: "git@github.com:pulp-platform/riscv-dbg", version: 0.7.0 } | ||
| common_cells: { git: "git@github.com:pulp-platform/common_cells", version: 1.25.0 } |
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I just briefly discussed this with @micprog. Our convention is to use https://<path>.git as a format for specifying the dependencies
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| # - target: test | ||
| # files: | ||
| # - corev_apu/tb/ariane_soc_pkg.sv | ||
| # - corev_apu/tb/ariane_axi_soc_pkg.sv | ||
| # - corev_apu/tb/ariane_testharness.sv | ||
| # - corev_apu/tb/ariane_peripherals.sv | ||
| # - corev_apu/tb/common/uart.sv | ||
| # - corev_apu/tb/common/SimDTM.sv | ||
| # - corev_apu/tb/common/SimJTAG.sv | ||
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| # - target: not(synthesis) | ||
| # files: | ||
| # - common/local/util/instr_tracer.sv | ||
| # - common/local/util/instr_tracer_if.sv | ||
| # - common/local/util/instr_trace_item.svh | ||
| # - common/local/util/ex_trace_item.svh | ||
| # - target: all(fpga, xilinx) | ||
| # files: | ||
| # - corev_apu/fpga/src/ariane_peripherals_xilinx.sv | ||
| # - corev_apu/fpga/src/ariane_xilinx.sv | ||
| # - corev_apu/fpga/src/fan_ctrl.sv | ||
| # - corev_apu/fpga/src/bootrom/bootrom.sv | ||
| # - corev_apu/fpga/src/ariane-ethernet/ssio_ddr_in.sv | ||
| # - corev_apu/fpga/src/ariane-ethernet/rgmii_soc.sv | ||
| # - corev_apu/fpga/src/ariane-ethernet/axis_gmii_rx.sv | ||
| # - corev_apu/fpga/src/ariane-ethernet/oddr.sv | ||
| # - corev_apu/fpga/src/ariane-ethernet/axis_gmii_tx.sv | ||
| # - corev_apu/fpga/src/ariane-ethernet/dualmem_widen8.sv | ||
| # - corev_apu/fpga/src/ariane-ethernet/rgmii_phy_if.sv | ||
| # - corev_apu/fpga/src/ariane-ethernet/dualmem_widen.sv | ||
| # - corev_apu/fpga/src/ariane-ethernet/rgmii_lfsr.sv | ||
| # - corev_apu/fpga/src/ariane-ethernet/rgmii_core.sv | ||
| # - corev_apu/fpga/src/ariane-ethernet/eth_mac_1g.sv | ||
| # - corev_apu/fpga/src/ariane-ethernet/eth_mac_1g_rgmii.sv | ||
| # - corev_apu/fpga/src/ariane-ethernet/eth_mac_1g_rgmii_fifo.sv | ||
| # - corev_apu/fpga/src/ariane-ethernet/iddr.sv | ||
| # - corev_apu/fpga/src/ariane-ethernet/framing_top.sv | ||
| # - corev_apu/fpga/src/apb_uart/src/apb_uart.vhd | ||
| # - corev_apu/fpga/src/apb_uart/src/uart_transmitter.vhd | ||
| # - corev_apu/fpga/src/apb_uart/src/uart_interrupt.vhd | ||
| # - corev_apu/fpga/src/apb_uart/src/slib_mv_filter.vhd | ||
| # - corev_apu/fpga/src/apb_uart/src/slib_input_filter.vhd | ||
| # - corev_apu/fpga/src/apb_uart/src/slib_counter.vhd | ||
| # - corev_apu/fpga/src/apb_uart/src/uart_receiver.vhd | ||
| # - corev_apu/fpga/src/apb_uart/src/slib_input_sync.vhd | ||
| # - corev_apu/fpga/src/apb_uart/src/slib_edge_detect.vhd | ||
| # - corev_apu/fpga/src/apb_uart/src/slib_clock_div.vhd | ||
| # - corev_apu/fpga/src/apb_uart/src/slib_fifo.vhd | ||
| # - corev_apu/fpga/src/apb_uart/src/uart_baudgen.vhd |
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To make this more general, could we perhaps add a target ariane_soc or similar to include the files needed to compile ariane_testharness or ariane_xilinx?
joennlae
reviewed
Feb 15, 2023
| - common/local/util/instr_tracer_if.sv | ||
| - common/local/util/instr_tracer.sv | ||
| - common/local/util/sram.sv | ||
| - common/local/util/tc_sram_xilinx_wrapper.sv |
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This file was renamed to common/local/util/tc_sram_fpga_wrapper.sv
joennlae
reviewed
Feb 15, 2023
| # - corev_apu/tb/ariane_peripherals.sv | ||
| # - corev_apu/tb/common/uart.sv | ||
| # - corev_apu/tb/common/SimDTM.sv | ||
| # - corev_apu/tb/common/SimJTAG.sv |
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I saw that axi_adapter.sv was move to corev_apu
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Superseded by #11 |
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Update the Bender.yml. Exclude system components and benderize dependencies. Contains all changes to
Bender.ymlfrom https://github.com/pulp-platform/cva6/tree/cheshire